xref: /llvm-project/llvm/test/CodeGen/LoongArch/ir-instruction/sext-zext-trunc.ll (revision 9d4f7f44b64d87d1068859906f43b7ce03a7388b) 
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc --mtriple=loongarch32 -mattr=+d < %s | FileCheck %s --check-prefix=LA32
3; RUN: llc --mtriple=loongarch64 -mattr=+d < %s | FileCheck %s --check-prefix=LA64
4
5;; Test sext/zext/trunc
6
7define i8 @sext_i1_to_i8(i1 %a) {
8; LA32-LABEL: sext_i1_to_i8:
9; LA32:       # %bb.0:
10; LA32-NEXT:    andi $a0, $a0, 1
11; LA32-NEXT:    sub.w $a0, $zero, $a0
12; LA32-NEXT:    ret
13;
14; LA64-LABEL: sext_i1_to_i8:
15; LA64:       # %bb.0:
16; LA64-NEXT:    andi $a0, $a0, 1
17; LA64-NEXT:    sub.d $a0, $zero, $a0
18; LA64-NEXT:    ret
19  %1 = sext i1 %a to i8
20  ret i8 %1
21}
22
23define i16 @sext_i1_to_i16(i1 %a) {
24; LA32-LABEL: sext_i1_to_i16:
25; LA32:       # %bb.0:
26; LA32-NEXT:    andi $a0, $a0, 1
27; LA32-NEXT:    sub.w $a0, $zero, $a0
28; LA32-NEXT:    ret
29;
30; LA64-LABEL: sext_i1_to_i16:
31; LA64:       # %bb.0:
32; LA64-NEXT:    andi $a0, $a0, 1
33; LA64-NEXT:    sub.d $a0, $zero, $a0
34; LA64-NEXT:    ret
35  %1 = sext i1 %a to i16
36  ret i16 %1
37}
38
39define i32 @sext_i1_to_i32(i1 %a) {
40; LA32-LABEL: sext_i1_to_i32:
41; LA32:       # %bb.0:
42; LA32-NEXT:    andi $a0, $a0, 1
43; LA32-NEXT:    sub.w $a0, $zero, $a0
44; LA32-NEXT:    ret
45;
46; LA64-LABEL: sext_i1_to_i32:
47; LA64:       # %bb.0:
48; LA64-NEXT:    andi $a0, $a0, 1
49; LA64-NEXT:    sub.d $a0, $zero, $a0
50; LA64-NEXT:    ret
51  %1 = sext i1 %a to i32
52  ret i32 %1
53}
54
55define i64 @sext_i1_to_i64(i1 %a) {
56; LA32-LABEL: sext_i1_to_i64:
57; LA32:       # %bb.0:
58; LA32-NEXT:    andi $a0, $a0, 1
59; LA32-NEXT:    sub.w $a0, $zero, $a0
60; LA32-NEXT:    move $a1, $a0
61; LA32-NEXT:    ret
62;
63; LA64-LABEL: sext_i1_to_i64:
64; LA64:       # %bb.0:
65; LA64-NEXT:    andi $a0, $a0, 1
66; LA64-NEXT:    sub.d $a0, $zero, $a0
67; LA64-NEXT:    ret
68  %1 = sext i1 %a to i64
69  ret i64 %1
70}
71
72define i16 @sext_i8_to_i16(i8 %a) {
73; LA32-LABEL: sext_i8_to_i16:
74; LA32:       # %bb.0:
75; LA32-NEXT:    ext.w.b $a0, $a0
76; LA32-NEXT:    ret
77;
78; LA64-LABEL: sext_i8_to_i16:
79; LA64:       # %bb.0:
80; LA64-NEXT:    ext.w.b $a0, $a0
81; LA64-NEXT:    ret
82  %1 = sext i8 %a to i16
83  ret i16 %1
84}
85
86define i32 @sext_i8_to_i32(i8 %a) {
87; LA32-LABEL: sext_i8_to_i32:
88; LA32:       # %bb.0:
89; LA32-NEXT:    ext.w.b $a0, $a0
90; LA32-NEXT:    ret
91;
92; LA64-LABEL: sext_i8_to_i32:
93; LA64:       # %bb.0:
94; LA64-NEXT:    ext.w.b $a0, $a0
95; LA64-NEXT:    ret
96  %1 = sext i8 %a to i32
97  ret i32 %1
98}
99
100define i64 @sext_i8_to_i64(i8 %a) {
101; LA32-LABEL: sext_i8_to_i64:
102; LA32:       # %bb.0:
103; LA32-NEXT:    ext.w.b $a0, $a0
104; LA32-NEXT:    srai.w $a1, $a0, 31
105; LA32-NEXT:    ret
106;
107; LA64-LABEL: sext_i8_to_i64:
108; LA64:       # %bb.0:
109; LA64-NEXT:    ext.w.b $a0, $a0
110; LA64-NEXT:    ret
111  %1 = sext i8 %a to i64
112  ret i64 %1
113}
114
115define i32 @sext_i16_to_i32(i16 %a) {
116; LA32-LABEL: sext_i16_to_i32:
117; LA32:       # %bb.0:
118; LA32-NEXT:    ext.w.h $a0, $a0
119; LA32-NEXT:    ret
120;
121; LA64-LABEL: sext_i16_to_i32:
122; LA64:       # %bb.0:
123; LA64-NEXT:    ext.w.h $a0, $a0
124; LA64-NEXT:    ret
125  %1 = sext i16 %a to i32
126  ret i32 %1
127}
128
129define i64 @sext_i16_to_i64(i16 %a) {
130; LA32-LABEL: sext_i16_to_i64:
131; LA32:       # %bb.0:
132; LA32-NEXT:    ext.w.h $a0, $a0
133; LA32-NEXT:    srai.w $a1, $a0, 31
134; LA32-NEXT:    ret
135;
136; LA64-LABEL: sext_i16_to_i64:
137; LA64:       # %bb.0:
138; LA64-NEXT:    ext.w.h $a0, $a0
139; LA64-NEXT:    ret
140  %1 = sext i16 %a to i64
141  ret i64 %1
142}
143
144define i64 @sext_i32_to_i64(i32 %a) {
145; LA32-LABEL: sext_i32_to_i64:
146; LA32:       # %bb.0:
147; LA32-NEXT:    srai.w $a1, $a0, 31
148; LA32-NEXT:    ret
149;
150; LA64-LABEL: sext_i32_to_i64:
151; LA64:       # %bb.0:
152; LA64-NEXT:    addi.w $a0, $a0, 0
153; LA64-NEXT:    ret
154  %1 = sext i32 %a to i64
155  ret i64 %1
156}
157
158define i8 @zext_i1_to_i8(i1 %a) {
159; LA32-LABEL: zext_i1_to_i8:
160; LA32:       # %bb.0:
161; LA32-NEXT:    andi $a0, $a0, 1
162; LA32-NEXT:    ret
163;
164; LA64-LABEL: zext_i1_to_i8:
165; LA64:       # %bb.0:
166; LA64-NEXT:    andi $a0, $a0, 1
167; LA64-NEXT:    ret
168  %1 = zext i1 %a to i8
169  ret i8 %1
170}
171
172define i16 @zext_i1_to_i16(i1 %a) {
173; LA32-LABEL: zext_i1_to_i16:
174; LA32:       # %bb.0:
175; LA32-NEXT:    andi $a0, $a0, 1
176; LA32-NEXT:    ret
177;
178; LA64-LABEL: zext_i1_to_i16:
179; LA64:       # %bb.0:
180; LA64-NEXT:    andi $a0, $a0, 1
181; LA64-NEXT:    ret
182  %1 = zext i1 %a to i16
183  ret i16 %1
184}
185
186define i32 @zext_i1_to_i32(i1 %a) {
187; LA32-LABEL: zext_i1_to_i32:
188; LA32:       # %bb.0:
189; LA32-NEXT:    andi $a0, $a0, 1
190; LA32-NEXT:    ret
191;
192; LA64-LABEL: zext_i1_to_i32:
193; LA64:       # %bb.0:
194; LA64-NEXT:    andi $a0, $a0, 1
195; LA64-NEXT:    ret
196  %1 = zext i1 %a to i32
197  ret i32 %1
198}
199
200define i64 @zext_i1_to_i64(i1 %a) {
201; LA32-LABEL: zext_i1_to_i64:
202; LA32:       # %bb.0:
203; LA32-NEXT:    andi $a0, $a0, 1
204; LA32-NEXT:    move $a1, $zero
205; LA32-NEXT:    ret
206;
207; LA64-LABEL: zext_i1_to_i64:
208; LA64:       # %bb.0:
209; LA64-NEXT:    andi $a0, $a0, 1
210; LA64-NEXT:    ret
211  %1 = zext i1 %a to i64
212  ret i64 %1
213}
214
215define i16 @zext_i8_to_i16(i8 %a) {
216; LA32-LABEL: zext_i8_to_i16:
217; LA32:       # %bb.0:
218; LA32-NEXT:    andi $a0, $a0, 255
219; LA32-NEXT:    ret
220;
221; LA64-LABEL: zext_i8_to_i16:
222; LA64:       # %bb.0:
223; LA64-NEXT:    andi $a0, $a0, 255
224; LA64-NEXT:    ret
225  %1 = zext i8 %a to i16
226  ret i16 %1
227}
228
229define i32 @zext_i8_to_i32(i8 %a) {
230; LA32-LABEL: zext_i8_to_i32:
231; LA32:       # %bb.0:
232; LA32-NEXT:    andi $a0, $a0, 255
233; LA32-NEXT:    ret
234;
235; LA64-LABEL: zext_i8_to_i32:
236; LA64:       # %bb.0:
237; LA64-NEXT:    andi $a0, $a0, 255
238; LA64-NEXT:    ret
239  %1 = zext i8 %a to i32
240  ret i32 %1
241}
242
243define i64 @zext_i8_to_i64(i8 %a) {
244; LA32-LABEL: zext_i8_to_i64:
245; LA32:       # %bb.0:
246; LA32-NEXT:    andi $a0, $a0, 255
247; LA32-NEXT:    move $a1, $zero
248; LA32-NEXT:    ret
249;
250; LA64-LABEL: zext_i8_to_i64:
251; LA64:       # %bb.0:
252; LA64-NEXT:    andi $a0, $a0, 255
253; LA64-NEXT:    ret
254  %1 = zext i8 %a to i64
255  ret i64 %1
256}
257
258define i32 @zext_i16_to_i32(i16 %a) {
259; LA32-LABEL: zext_i16_to_i32:
260; LA32:       # %bb.0:
261; LA32-NEXT:    bstrpick.w $a0, $a0, 15, 0
262; LA32-NEXT:    ret
263;
264; LA64-LABEL: zext_i16_to_i32:
265; LA64:       # %bb.0:
266; LA64-NEXT:    bstrpick.d $a0, $a0, 15, 0
267; LA64-NEXT:    ret
268  %1 = zext i16 %a to i32
269  ret i32 %1
270}
271
272define i64 @zext_i16_to_i64(i16 %a) {
273; LA32-LABEL: zext_i16_to_i64:
274; LA32:       # %bb.0:
275; LA32-NEXT:    bstrpick.w $a0, $a0, 15, 0
276; LA32-NEXT:    move $a1, $zero
277; LA32-NEXT:    ret
278;
279; LA64-LABEL: zext_i16_to_i64:
280; LA64:       # %bb.0:
281; LA64-NEXT:    bstrpick.d $a0, $a0, 15, 0
282; LA64-NEXT:    ret
283  %1 = zext i16 %a to i64
284  ret i64 %1
285}
286
287define i64 @zext_i32_to_i64(i32 %a) {
288; LA32-LABEL: zext_i32_to_i64:
289; LA32:       # %bb.0:
290; LA32-NEXT:    move $a1, $zero
291; LA32-NEXT:    ret
292;
293; LA64-LABEL: zext_i32_to_i64:
294; LA64:       # %bb.0:
295; LA64-NEXT:    bstrpick.d $a0, $a0, 31, 0
296; LA64-NEXT:    ret
297  %1 = zext i32 %a to i64
298  ret i64 %1
299}
300
301define i1 @trunc_i8_to_i1(i8 %a) {
302; LA32-LABEL: trunc_i8_to_i1:
303; LA32:       # %bb.0:
304; LA32-NEXT:    ret
305;
306; LA64-LABEL: trunc_i8_to_i1:
307; LA64:       # %bb.0:
308; LA64-NEXT:    ret
309  %1 = trunc i8 %a to i1
310  ret i1 %1
311}
312
313define i1 @trunc_i16_to_i1(i16 %a) {
314; LA32-LABEL: trunc_i16_to_i1:
315; LA32:       # %bb.0:
316; LA32-NEXT:    ret
317;
318; LA64-LABEL: trunc_i16_to_i1:
319; LA64:       # %bb.0:
320; LA64-NEXT:    ret
321  %1 = trunc i16 %a to i1
322  ret i1 %1
323}
324
325define i1 @trunc_i32_to_i1(i32 %a) {
326; LA32-LABEL: trunc_i32_to_i1:
327; LA32:       # %bb.0:
328; LA32-NEXT:    ret
329;
330; LA64-LABEL: trunc_i32_to_i1:
331; LA64:       # %bb.0:
332; LA64-NEXT:    ret
333  %1 = trunc i32 %a to i1
334  ret i1 %1
335}
336
337define i1 @trunc_i64_to_i1(i64 %a) {
338; LA32-LABEL: trunc_i64_to_i1:
339; LA32:       # %bb.0:
340; LA32-NEXT:    ret
341;
342; LA64-LABEL: trunc_i64_to_i1:
343; LA64:       # %bb.0:
344; LA64-NEXT:    ret
345  %1 = trunc i64 %a to i1
346  ret i1 %1
347}
348
349define i8 @trunc_i16_to_i8(i16 %a) {
350; LA32-LABEL: trunc_i16_to_i8:
351; LA32:       # %bb.0:
352; LA32-NEXT:    ret
353;
354; LA64-LABEL: trunc_i16_to_i8:
355; LA64:       # %bb.0:
356; LA64-NEXT:    ret
357  %1 = trunc i16 %a to i8
358  ret i8 %1
359}
360
361define i8 @trunc_i32_to_i8(i32 %a) {
362; LA32-LABEL: trunc_i32_to_i8:
363; LA32:       # %bb.0:
364; LA32-NEXT:    ret
365;
366; LA64-LABEL: trunc_i32_to_i8:
367; LA64:       # %bb.0:
368; LA64-NEXT:    ret
369  %1 = trunc i32 %a to i8
370  ret i8 %1
371}
372
373define i8 @trunc_i64_to_i8(i64 %a) {
374; LA32-LABEL: trunc_i64_to_i8:
375; LA32:       # %bb.0:
376; LA32-NEXT:    ret
377;
378; LA64-LABEL: trunc_i64_to_i8:
379; LA64:       # %bb.0:
380; LA64-NEXT:    ret
381  %1 = trunc i64 %a to i8
382  ret i8 %1
383}
384
385define i16 @trunc_i32_to_i16(i32 %a) {
386; LA32-LABEL: trunc_i32_to_i16:
387; LA32:       # %bb.0:
388; LA32-NEXT:    ret
389;
390; LA64-LABEL: trunc_i32_to_i16:
391; LA64:       # %bb.0:
392; LA64-NEXT:    ret
393  %1 = trunc i32 %a to i16
394  ret i16 %1
395}
396
397define i16 @trunc_i64_to_i16(i64 %a) {
398; LA32-LABEL: trunc_i64_to_i16:
399; LA32:       # %bb.0:
400; LA32-NEXT:    ret
401;
402; LA64-LABEL: trunc_i64_to_i16:
403; LA64:       # %bb.0:
404; LA64-NEXT:    ret
405  %1 = trunc i64 %a to i16
406  ret i16 %1
407}
408
409define i32 @trunc_i64_to_i32(i64 %a) {
410; LA32-LABEL: trunc_i64_to_i32:
411; LA32:       # %bb.0:
412; LA32-NEXT:    ret
413;
414; LA64-LABEL: trunc_i64_to_i32:
415; LA64:       # %bb.0:
416; LA64-NEXT:    ret
417  %1 = trunc i64 %a to i32
418  ret i32 %1
419}
420