1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc --mtriple=loongarch32 -mattr=+d < %s | FileCheck %s --check-prefixes=ALL,LA32 3; RUN: llc --mtriple=loongarch64 -mattr=+d < %s | FileCheck %s --check-prefixes=ALL,LA64 4 5define void @foo() noreturn nounwind { 6; ALL-LABEL: foo: 7; ALL: # %bb.0: # %entry 8; ALL-NEXT: .p2align 4, , 16 9; ALL-NEXT: .LBB0_1: # %loop 10; ALL-NEXT: # =>This Inner Loop Header: Depth=1 11; ALL-NEXT: b .LBB0_1 12entry: 13 br label %loop 14loop: 15 br label %loop 16} 17 18define void @foo_br_eq(i32 %a, ptr %b) nounwind { 19; LA32-LABEL: foo_br_eq: 20; LA32: # %bb.0: 21; LA32-NEXT: ld.w $a2, $a1, 0 22; LA32-NEXT: beq $a2, $a0, .LBB1_2 23; LA32-NEXT: # %bb.1: # %test 24; LA32-NEXT: ld.w $zero, $a1, 0 25; LA32-NEXT: .LBB1_2: # %end 26; LA32-NEXT: ret 27; 28; LA64-LABEL: foo_br_eq: 29; LA64: # %bb.0: 30; LA64-NEXT: ld.w $a2, $a1, 0 31; LA64-NEXT: addi.w $a0, $a0, 0 32; LA64-NEXT: beq $a2, $a0, .LBB1_2 33; LA64-NEXT: # %bb.1: # %test 34; LA64-NEXT: ld.w $zero, $a1, 0 35; LA64-NEXT: .LBB1_2: # %end 36; LA64-NEXT: ret 37 %val = load volatile i32, ptr %b 38 %cc = icmp eq i32 %val, %a 39 br i1 %cc, label %end, label %test 40test: 41 %tmp = load volatile i32, ptr %b 42 br label %end 43 44end: 45 ret void 46} 47 48define void @foo_br_ne(i32 %a, ptr %b) nounwind { 49; LA32-LABEL: foo_br_ne: 50; LA32: # %bb.0: 51; LA32-NEXT: ld.w $a2, $a1, 0 52; LA32-NEXT: bne $a2, $a0, .LBB2_2 53; LA32-NEXT: # %bb.1: # %test 54; LA32-NEXT: ld.w $zero, $a1, 0 55; LA32-NEXT: .LBB2_2: # %end 56; LA32-NEXT: ret 57; 58; LA64-LABEL: foo_br_ne: 59; LA64: # %bb.0: 60; LA64-NEXT: ld.w $a2, $a1, 0 61; LA64-NEXT: addi.w $a0, $a0, 0 62; LA64-NEXT: bne $a2, $a0, .LBB2_2 63; LA64-NEXT: # %bb.1: # %test 64; LA64-NEXT: ld.w $zero, $a1, 0 65; LA64-NEXT: .LBB2_2: # %end 66; LA64-NEXT: ret 67 %val = load volatile i32, ptr %b 68 %cc = icmp ne i32 %val, %a 69 br i1 %cc, label %end, label %test 70test: 71 %tmp = load volatile i32, ptr %b 72 br label %end 73 74end: 75 ret void 76} 77 78define void @foo_br_slt(i32 %a, ptr %b) nounwind { 79; LA32-LABEL: foo_br_slt: 80; LA32: # %bb.0: 81; LA32-NEXT: ld.w $a2, $a1, 0 82; LA32-NEXT: blt $a2, $a0, .LBB3_2 83; LA32-NEXT: # %bb.1: # %test 84; LA32-NEXT: ld.w $zero, $a1, 0 85; LA32-NEXT: .LBB3_2: # %end 86; LA32-NEXT: ret 87; 88; LA64-LABEL: foo_br_slt: 89; LA64: # %bb.0: 90; LA64-NEXT: ld.w $a2, $a1, 0 91; LA64-NEXT: addi.w $a0, $a0, 0 92; LA64-NEXT: blt $a2, $a0, .LBB3_2 93; LA64-NEXT: # %bb.1: # %test 94; LA64-NEXT: ld.w $zero, $a1, 0 95; LA64-NEXT: .LBB3_2: # %end 96; LA64-NEXT: ret 97 %val = load volatile i32, ptr %b 98 %cc = icmp slt i32 %val, %a 99 br i1 %cc, label %end, label %test 100test: 101 %tmp = load volatile i32, ptr %b 102 br label %end 103 104end: 105 ret void 106} 107 108define void @foo_br_sge(i32 %a, ptr %b) nounwind { 109; LA32-LABEL: foo_br_sge: 110; LA32: # %bb.0: 111; LA32-NEXT: ld.w $a2, $a1, 0 112; LA32-NEXT: bge $a2, $a0, .LBB4_2 113; LA32-NEXT: # %bb.1: # %test 114; LA32-NEXT: ld.w $zero, $a1, 0 115; LA32-NEXT: .LBB4_2: # %end 116; LA32-NEXT: ret 117; 118; LA64-LABEL: foo_br_sge: 119; LA64: # %bb.0: 120; LA64-NEXT: ld.w $a2, $a1, 0 121; LA64-NEXT: addi.w $a0, $a0, 0 122; LA64-NEXT: bge $a2, $a0, .LBB4_2 123; LA64-NEXT: # %bb.1: # %test 124; LA64-NEXT: ld.w $zero, $a1, 0 125; LA64-NEXT: .LBB4_2: # %end 126; LA64-NEXT: ret 127 %val = load volatile i32, ptr %b 128 %cc = icmp sge i32 %val, %a 129 br i1 %cc, label %end, label %test 130test: 131 %tmp = load volatile i32, ptr %b 132 br label %end 133 134end: 135 ret void 136} 137 138define void @foo_br_ult(i32 %a, ptr %b) nounwind { 139; LA32-LABEL: foo_br_ult: 140; LA32: # %bb.0: 141; LA32-NEXT: ld.w $a2, $a1, 0 142; LA32-NEXT: bltu $a2, $a0, .LBB5_2 143; LA32-NEXT: # %bb.1: # %test 144; LA32-NEXT: ld.w $zero, $a1, 0 145; LA32-NEXT: .LBB5_2: # %end 146; LA32-NEXT: ret 147; 148; LA64-LABEL: foo_br_ult: 149; LA64: # %bb.0: 150; LA64-NEXT: ld.w $a2, $a1, 0 151; LA64-NEXT: addi.w $a0, $a0, 0 152; LA64-NEXT: bltu $a2, $a0, .LBB5_2 153; LA64-NEXT: # %bb.1: # %test 154; LA64-NEXT: ld.w $zero, $a1, 0 155; LA64-NEXT: .LBB5_2: # %end 156; LA64-NEXT: ret 157 %val = load volatile i32, ptr %b 158 %cc = icmp ult i32 %val, %a 159 br i1 %cc, label %end, label %test 160test: 161 %tmp = load volatile i32, ptr %b 162 br label %end 163 164end: 165 ret void 166} 167 168define void @foo_br_uge(i32 %a, ptr %b) nounwind { 169; LA32-LABEL: foo_br_uge: 170; LA32: # %bb.0: 171; LA32-NEXT: ld.w $a2, $a1, 0 172; LA32-NEXT: bgeu $a2, $a0, .LBB6_2 173; LA32-NEXT: # %bb.1: # %test 174; LA32-NEXT: ld.w $zero, $a1, 0 175; LA32-NEXT: .LBB6_2: # %end 176; LA32-NEXT: ret 177; 178; LA64-LABEL: foo_br_uge: 179; LA64: # %bb.0: 180; LA64-NEXT: ld.w $a2, $a1, 0 181; LA64-NEXT: addi.w $a0, $a0, 0 182; LA64-NEXT: bgeu $a2, $a0, .LBB6_2 183; LA64-NEXT: # %bb.1: # %test 184; LA64-NEXT: ld.w $zero, $a1, 0 185; LA64-NEXT: .LBB6_2: # %end 186; LA64-NEXT: ret 187 %val = load volatile i32, ptr %b 188 %cc = icmp uge i32 %val, %a 189 br i1 %cc, label %end, label %test 190test: 191 %tmp = load volatile i32, ptr %b 192 br label %end 193 194end: 195 ret void 196} 197 198;; Check for condition codes that don't have a matching instruction. 199define void @foo_br_sgt(i32 %a, ptr %b) nounwind { 200; LA32-LABEL: foo_br_sgt: 201; LA32: # %bb.0: 202; LA32-NEXT: ld.w $a2, $a1, 0 203; LA32-NEXT: blt $a0, $a2, .LBB7_2 204; LA32-NEXT: # %bb.1: # %test 205; LA32-NEXT: ld.w $zero, $a1, 0 206; LA32-NEXT: .LBB7_2: # %end 207; LA32-NEXT: ret 208; 209; LA64-LABEL: foo_br_sgt: 210; LA64: # %bb.0: 211; LA64-NEXT: ld.w $a2, $a1, 0 212; LA64-NEXT: addi.w $a0, $a0, 0 213; LA64-NEXT: blt $a0, $a2, .LBB7_2 214; LA64-NEXT: # %bb.1: # %test 215; LA64-NEXT: ld.w $zero, $a1, 0 216; LA64-NEXT: .LBB7_2: # %end 217; LA64-NEXT: ret 218 %val = load volatile i32, ptr %b 219 %cc = icmp sgt i32 %val, %a 220 br i1 %cc, label %end, label %test 221test: 222 %tmp = load volatile i32, ptr %b 223 br label %end 224 225end: 226 ret void 227} 228 229define void @foo_br_sle(i32 %a, ptr %b) nounwind { 230; LA32-LABEL: foo_br_sle: 231; LA32: # %bb.0: 232; LA32-NEXT: ld.w $a2, $a1, 0 233; LA32-NEXT: bge $a0, $a2, .LBB8_2 234; LA32-NEXT: # %bb.1: # %test 235; LA32-NEXT: ld.w $zero, $a1, 0 236; LA32-NEXT: .LBB8_2: # %end 237; LA32-NEXT: ret 238; 239; LA64-LABEL: foo_br_sle: 240; LA64: # %bb.0: 241; LA64-NEXT: ld.w $a2, $a1, 0 242; LA64-NEXT: addi.w $a0, $a0, 0 243; LA64-NEXT: bge $a0, $a2, .LBB8_2 244; LA64-NEXT: # %bb.1: # %test 245; LA64-NEXT: ld.w $zero, $a1, 0 246; LA64-NEXT: .LBB8_2: # %end 247; LA64-NEXT: ret 248 %val = load volatile i32, ptr %b 249 %cc = icmp sle i32 %val, %a 250 br i1 %cc, label %end, label %test 251test: 252 %tmp = load volatile i32, ptr %b 253 br label %end 254 255end: 256 ret void 257} 258 259define void @foo_br_ugt(i32 %a, ptr %b) nounwind { 260; LA32-LABEL: foo_br_ugt: 261; LA32: # %bb.0: 262; LA32-NEXT: ld.w $a2, $a1, 0 263; LA32-NEXT: bltu $a0, $a2, .LBB9_2 264; LA32-NEXT: # %bb.1: # %test 265; LA32-NEXT: ld.w $zero, $a1, 0 266; LA32-NEXT: .LBB9_2: # %end 267; LA32-NEXT: ret 268; 269; LA64-LABEL: foo_br_ugt: 270; LA64: # %bb.0: 271; LA64-NEXT: ld.w $a2, $a1, 0 272; LA64-NEXT: addi.w $a0, $a0, 0 273; LA64-NEXT: bltu $a0, $a2, .LBB9_2 274; LA64-NEXT: # %bb.1: # %test 275; LA64-NEXT: ld.w $zero, $a1, 0 276; LA64-NEXT: .LBB9_2: # %end 277; LA64-NEXT: ret 278 %val = load volatile i32, ptr %b 279 %cc = icmp ugt i32 %val, %a 280 br i1 %cc, label %end, label %test 281test: 282 %tmp = load volatile i32, ptr %b 283 br label %end 284 285end: 286 ret void 287} 288 289define void @foo_br_ule(i32 %a, ptr %b) nounwind { 290; LA32-LABEL: foo_br_ule: 291; LA32: # %bb.0: 292; LA32-NEXT: ld.w $a2, $a1, 0 293; LA32-NEXT: bgeu $a0, $a2, .LBB10_2 294; LA32-NEXT: # %bb.1: # %test 295; LA32-NEXT: ld.w $zero, $a1, 0 296; LA32-NEXT: .LBB10_2: # %end 297; LA32-NEXT: ret 298; 299; LA64-LABEL: foo_br_ule: 300; LA64: # %bb.0: 301; LA64-NEXT: ld.w $a2, $a1, 0 302; LA64-NEXT: addi.w $a0, $a0, 0 303; LA64-NEXT: bgeu $a0, $a2, .LBB10_2 304; LA64-NEXT: # %bb.1: # %test 305; LA64-NEXT: ld.w $zero, $a1, 0 306; LA64-NEXT: .LBB10_2: # %end 307; LA64-NEXT: ret 308 %val = load volatile i32, ptr %b 309 %cc = icmp ule i32 %val, %a 310 br i1 %cc, label %end, label %test 311test: 312 %tmp = load volatile i32, ptr %b 313 br label %end 314 315end: 316 ret void 317} 318 319;; Check the case of a branch where the condition was generated in another 320;; function. 321define void @foo_br_cc(ptr %a, i1 %cc) nounwind { 322; ALL-LABEL: foo_br_cc: 323; ALL: # %bb.0: 324; ALL-NEXT: ld.w $zero, $a0, 0 325; ALL-NEXT: andi $a1, $a1, 1 326; ALL-NEXT: bnez $a1, .LBB11_2 327; ALL-NEXT: # %bb.1: # %test 328; ALL-NEXT: ld.w $zero, $a0, 0 329; ALL-NEXT: .LBB11_2: # %end 330; ALL-NEXT: ret 331 %val = load volatile i32, ptr %a 332 br i1 %cc, label %end, label %test 333test: 334 %tmp = load volatile i32, ptr %a 335 br label %end 336 337end: 338 ret void 339} 340