xref: /llvm-project/llvm/test/CodeGen/LoongArch/intrinsic-la64.ll (revision 240512c43234f58b3924cd90fe0781445d97e98d)
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc --mtriple=loongarch64 -mattr=+d < %s | FileCheck %s
3
4declare void @llvm.loongarch.cacop.d(i64, i64, i64)
5declare i32 @llvm.loongarch.crc.w.b.w(i32, i32)
6declare i32 @llvm.loongarch.crc.w.h.w(i32, i32)
7declare i32 @llvm.loongarch.crc.w.w.w(i32, i32)
8declare i32 @llvm.loongarch.crc.w.d.w(i64, i32)
9declare i32 @llvm.loongarch.crcc.w.b.w(i32, i32)
10declare i32 @llvm.loongarch.crcc.w.h.w(i32, i32)
11declare i32 @llvm.loongarch.crcc.w.w.w(i32, i32)
12declare i32 @llvm.loongarch.crcc.w.d.w(i64, i32)
13declare i64 @llvm.loongarch.csrrd.d(i32 immarg)
14declare i64 @llvm.loongarch.csrwr.d(i64, i32 immarg)
15declare i64 @llvm.loongarch.csrxchg.d(i64, i64, i32 immarg)
16declare i64 @llvm.loongarch.iocsrrd.d(i32)
17declare void @llvm.loongarch.iocsrwr.d(i64, i32)
18declare void @llvm.loongarch.asrtle.d(i64, i64)
19declare void @llvm.loongarch.asrtgt.d(i64, i64)
20declare i64 @llvm.loongarch.lddir.d(i64, i64)
21declare void @llvm.loongarch.ldpte.d(i64, i64)
22
23define i32 @crc_w_b_w(i32 %a, i32 %b) nounwind {
24; CHECK-LABEL: crc_w_b_w:
25; CHECK:       # %bb.0:
26; CHECK-NEXT:    crc.w.b.w $a0, $a0, $a1
27; CHECK-NEXT:    ret
28  %res = call i32 @llvm.loongarch.crc.w.b.w(i32 %a, i32 %b)
29  ret i32 %res
30}
31
32define void @crc_w_b_w_noret(i32 %a, i32 %b) nounwind {
33; CHECK-LABEL: crc_w_b_w_noret:
34; CHECK:       # %bb.0:
35; CHECK-NEXT:    ret
36  %res = call i32 @llvm.loongarch.crc.w.b.w(i32 %a, i32 %b)
37  ret void
38}
39
40define i32 @crc_w_h_w(i32 %a, i32 %b) nounwind {
41; CHECK-LABEL: crc_w_h_w:
42; CHECK:       # %bb.0:
43; CHECK-NEXT:    crc.w.h.w $a0, $a0, $a1
44; CHECK-NEXT:    ret
45  %res = call i32 @llvm.loongarch.crc.w.h.w(i32 %a, i32 %b)
46  ret i32 %res
47}
48
49define void @crc_w_h_w_noret(i32 %a, i32 %b) nounwind {
50; CHECK-LABEL: crc_w_h_w_noret:
51; CHECK:       # %bb.0:
52; CHECK-NEXT:    ret
53  %res = call i32 @llvm.loongarch.crc.w.h.w(i32 %a, i32 %b)
54  ret void
55}
56
57define i32 @crc_w_w_w(i32 %a, i32 %b) nounwind {
58; CHECK-LABEL: crc_w_w_w:
59; CHECK:       # %bb.0:
60; CHECK-NEXT:    crc.w.w.w $a0, $a0, $a1
61; CHECK-NEXT:    ret
62  %res = call i32 @llvm.loongarch.crc.w.w.w(i32 %a, i32 %b)
63  ret i32 %res
64}
65
66define void @crc_w_w_w_noret(i32 %a, i32 %b) nounwind {
67; CHECK-LABEL: crc_w_w_w_noret:
68; CHECK:       # %bb.0:
69; CHECK-NEXT:    ret
70  %res = call i32 @llvm.loongarch.crc.w.w.w(i32 %a, i32 %b)
71  ret void
72}
73
74define void @cacop_d(i64 %a) nounwind {
75; CHECK-LABEL: cacop_d:
76; CHECK:       # %bb.0:
77; CHECK-NEXT:    cacop 1, $a0, 4
78; CHECK-NEXT:    ret
79  call void @llvm.loongarch.cacop.d(i64 1, i64 %a, i64 4)
80  ret void
81}
82
83define i32 @crc_w_d_w(i64 %a, i32 %b) nounwind {
84; CHECK-LABEL: crc_w_d_w:
85; CHECK:       # %bb.0:
86; CHECK-NEXT:    crc.w.d.w $a0, $a0, $a1
87; CHECK-NEXT:    ret
88  %res = call i32 @llvm.loongarch.crc.w.d.w(i64 %a, i32 %b)
89  ret i32 %res
90}
91
92define void @crc_w_d_w_noret(i64 %a, i32 %b) nounwind {
93; CHECK-LABEL: crc_w_d_w_noret:
94; CHECK:       # %bb.0:
95; CHECK-NEXT:    ret
96  %res = call i32 @llvm.loongarch.crc.w.d.w(i64 %a, i32 %b)
97  ret void
98}
99
100define i32 @crcc_w_b_w(i32 %a, i32 %b) nounwind {
101; CHECK-LABEL: crcc_w_b_w:
102; CHECK:       # %bb.0:
103; CHECK-NEXT:    crcc.w.b.w $a0, $a0, $a1
104; CHECK-NEXT:    ret
105  %res = call i32 @llvm.loongarch.crcc.w.b.w(i32 %a, i32 %b)
106  ret i32 %res
107}
108
109define void @crcc_w_b_w_noret(i32 %a, i32 %b) nounwind {
110; CHECK-LABEL: crcc_w_b_w_noret:
111; CHECK:       # %bb.0:
112; CHECK-NEXT:    ret
113  %res = call i32 @llvm.loongarch.crcc.w.b.w(i32 %a, i32 %b)
114  ret void
115}
116
117define i32 @crcc_w_h_w(i32 %a, i32 %b) nounwind {
118; CHECK-LABEL: crcc_w_h_w:
119; CHECK:       # %bb.0:
120; CHECK-NEXT:    crcc.w.h.w $a0, $a0, $a1
121; CHECK-NEXT:    ret
122  %res = call i32 @llvm.loongarch.crcc.w.h.w(i32 %a, i32 %b)
123  ret i32 %res
124}
125
126define void @crcc_w_h_w_noret(i32 %a, i32 %b) nounwind {
127; CHECK-LABEL: crcc_w_h_w_noret:
128; CHECK:       # %bb.0:
129; CHECK-NEXT:    ret
130  %res = call i32 @llvm.loongarch.crcc.w.h.w(i32 %a, i32 %b)
131  ret void
132}
133
134define i32 @crcc_w_w_w(i32 %a, i32 %b) nounwind {
135; CHECK-LABEL: crcc_w_w_w:
136; CHECK:       # %bb.0:
137; CHECK-NEXT:    crcc.w.w.w $a0, $a0, $a1
138; CHECK-NEXT:    ret
139  %res = call i32 @llvm.loongarch.crcc.w.w.w(i32 %a, i32 %b)
140  ret i32 %res
141}
142
143define void @crcc_w_w_w_noret(i32 %a, i32 %b) nounwind {
144; CHECK-LABEL: crcc_w_w_w_noret:
145; CHECK:       # %bb.0:
146; CHECK-NEXT:    ret
147  %res = call i32 @llvm.loongarch.crcc.w.w.w(i32 %a, i32 %b)
148  ret void
149}
150
151define i32 @crcc_w_d_w(i64 %a, i32 %b) nounwind {
152; CHECK-LABEL: crcc_w_d_w:
153; CHECK:       # %bb.0:
154; CHECK-NEXT:    crcc.w.d.w $a0, $a0, $a1
155; CHECK-NEXT:    ret
156  %res = call i32 @llvm.loongarch.crcc.w.d.w(i64 %a, i32 %b)
157  ret i32 %res
158}
159
160define void @crcc_w_d_w_noret(i64 %a, i32 %b) nounwind {
161; CHECK-LABEL: crcc_w_d_w_noret:
162; CHECK:       # %bb.0:
163; CHECK-NEXT:    ret
164  %res = call i32 @llvm.loongarch.crcc.w.d.w(i64 %a, i32 %b)
165  ret void
166}
167
168define i64 @csrrd_d() {
169; CHECK-LABEL: csrrd_d:
170; CHECK:       # %bb.0: # %entry
171; CHECK-NEXT:    csrrd $a0, 1
172; CHECK-NEXT:    ret
173entry:
174  %0 = tail call i64 @llvm.loongarch.csrrd.d(i32 1)
175  ret i64 %0
176}
177
178define void @csrrd_d_noret() {
179; CHECK-LABEL: csrrd_d_noret:
180; CHECK:       # %bb.0: # %entry
181; CHECK-NEXT:    csrrd $zero, 1
182; CHECK-NEXT:    ret
183entry:
184  %0 = tail call i64 @llvm.loongarch.csrrd.d(i32 1)
185  ret void
186}
187
188define i64 @csrwr_d(i64 %a) {
189; CHECK-LABEL: csrwr_d:
190; CHECK:       # %bb.0: # %entry
191; CHECK-NEXT:    csrwr $a0, 1
192; CHECK-NEXT:    ret
193entry:
194  %0 = tail call i64 @llvm.loongarch.csrwr.d(i64 %a, i32 1)
195  ret i64 %0
196}
197
198;; Check that csrwr is emitted even if the return value of the intrinsic is not used.
199define void @csrwr_d_noret(i64 %a) {
200; CHECK-LABEL: csrwr_d_noret:
201; CHECK:       # %bb.0: # %entry
202; CHECK-NEXT:    csrwr $a0, 1
203; CHECK-NEXT:    ret
204entry:
205  %0 = tail call i64 @llvm.loongarch.csrwr.d(i64 %a, i32 1)
206  ret void
207}
208
209define i64 @csrxchg_d(i64 %a, i64 %b) {
210; CHECK-LABEL: csrxchg_d:
211; CHECK:       # %bb.0: # %entry
212; CHECK-NEXT:    csrxchg $a0, $a1, 1
213; CHECK-NEXT:    ret
214entry:
215  %0 = tail call i64 @llvm.loongarch.csrxchg.d(i64 %a, i64 %b, i32 1)
216  ret i64 %0
217}
218
219;; Check that csrxchg is emitted even if the return value of the intrinsic is not used.
220define void @csrxchg_d_noret(i64 %a, i64 %b) {
221; CHECK-LABEL: csrxchg_d_noret:
222; CHECK:       # %bb.0: # %entry
223; CHECK-NEXT:    csrxchg $a0, $a1, 1
224; CHECK-NEXT:    ret
225entry:
226  %0 = tail call i64 @llvm.loongarch.csrxchg.d(i64 %a, i64 %b, i32 1)
227  ret void
228}
229
230define i64 @iocsrrd_d(i32 %a) {
231; CHECK-LABEL: iocsrrd_d:
232; CHECK:       # %bb.0: # %entry
233; CHECK-NEXT:    iocsrrd.d $a0, $a0
234; CHECK-NEXT:    ret
235entry:
236  %0 = tail call i64 @llvm.loongarch.iocsrrd.d(i32 %a)
237  ret i64 %0
238}
239
240define void @iocsrrd_d_noret(i32 %a) {
241; CHECK-LABEL: iocsrrd_d_noret:
242; CHECK:       # %bb.0: # %entry
243; CHECK-NEXT:    iocsrrd.d $zero, $a0
244; CHECK-NEXT:    ret
245entry:
246  %0 = tail call i64 @llvm.loongarch.iocsrrd.d(i32 %a)
247  ret void
248}
249
250define void @iocsrwr_d(i64 %a, i32 signext %b) {
251; CHECK-LABEL: iocsrwr_d:
252; CHECK:       # %bb.0: # %entry
253; CHECK-NEXT:    iocsrwr.d $a0, $a1
254; CHECK-NEXT:    ret
255entry:
256  tail call void @llvm.loongarch.iocsrwr.d(i64 %a, i32 %b)
257  ret void
258}
259
260define void @asrtle_d(i64 %a, i64 %b) {
261; CHECK-LABEL: asrtle_d:
262; CHECK:       # %bb.0: # %entry
263; CHECK-NEXT:    asrtle.d $a0, $a1
264; CHECK-NEXT:    ret
265entry:
266  tail call void @llvm.loongarch.asrtle.d(i64 %a, i64 %b)
267  ret void
268}
269
270define void @asrtgt_d(i64 %a, i64 %b) {
271; CHECK-LABEL: asrtgt_d:
272; CHECK:       # %bb.0: # %entry
273; CHECK-NEXT:    asrtgt.d $a0, $a1
274; CHECK-NEXT:    ret
275entry:
276  tail call void @llvm.loongarch.asrtgt.d(i64 %a, i64 %b)
277  ret void
278}
279
280define i64 @lddir_d(i64 %a) {
281; CHECK-LABEL: lddir_d:
282; CHECK:       # %bb.0: # %entry
283; CHECK-NEXT:    lddir $a0, $a0, 1
284; CHECK-NEXT:    ret
285entry:
286  %0 = tail call i64 @llvm.loongarch.lddir.d(i64 %a, i64 1)
287  ret i64 %0
288}
289
290define void @lddir_d_noret(i64 %a) {
291; CHECK-LABEL: lddir_d_noret:
292; CHECK:       # %bb.0: # %entry
293; CHECK-NEXT:    lddir $zero, $a0, 1
294; CHECK-NEXT:    ret
295entry:
296  %0 = tail call i64 @llvm.loongarch.lddir.d(i64 %a, i64 1)
297  ret void
298}
299
300define void @ldpte_d(i64 %a) {
301; CHECK-LABEL: ldpte_d:
302; CHECK:       # %bb.0: # %entry
303; CHECK-NEXT:    ldpte $a0, 1
304; CHECK-NEXT:    ret
305entry:
306  tail call void @llvm.loongarch.ldpte.d(i64 %a, i64 1)
307  ret void
308}
309