xref: /llvm-project/llvm/test/CodeGen/LoongArch/inline-asm-clobbers-fcc.mir (revision 271087e3a0875672b26c185a28b3552d5600d2fb)
1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
2# RUN: llc --mtriple=loongarch64 --mattr=+d --regalloc=fast \
3# RUN:     --stop-before=postra-machine-sink %s -o - | FileCheck %s
4
5## Check that fcc register clobbered by inlineasm is correctly saved by examing
6## a pair of pseudos (PseudoST_CFR and PseudoLD_CFR) are generated before and
7## after the INLINEASM.
8...
9---
10name: test
11tracksRegLiveness: true
12body:             |
13  bb.0.entry:
14    liveins: $f0_64, $f1_64
15
16    ; CHECK-LABEL: name: test
17    ; CHECK: liveins: $f0_64, $f1_64
18    ; CHECK-NEXT: {{  $}}
19    ; CHECK-NEXT: renamable $fcc0 = FCMP_CLT_D renamable $f1_64, renamable $f0_64
20    ; CHECK-NEXT: PseudoST_CFR $fcc0, %stack.0, 0 :: (store (s64) into %stack.0)
21    ; CHECK-NEXT: INLINEASM &nop, 1 /* sideeffect attdialect */, 12 /* clobber */, implicit-def dead early-clobber $fcc0
22    ; CHECK-NEXT: $fcc0 = PseudoLD_CFR %stack.0, 0 :: (load (s64) from %stack.0)
23    ; CHECK-NEXT: $r4 = COPY killed renamable $fcc0
24    ; CHECK-NEXT: PseudoRET implicit killed $r4
25    %1:fpr64 = COPY $f1_64
26    %0:fpr64 = COPY $f0_64
27    %2:cfr = FCMP_CLT_D %1, %0
28    INLINEASM &"nop", 1 /* sideeffect attdialect */, 12 /* clobber */, implicit-def dead early-clobber $fcc0
29    $r4 = COPY %2
30    PseudoRET implicit killed $r4
31
32...
33