xref: /llvm-project/llvm/test/CodeGen/LoongArch/andn-icmp.ll (revision 4c73b1a986bb4f3af6c5d5e9e705934dbcc36262) 
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc --mtriple=loongarch32 -mattr=+d < %s | FileCheck %s --check-prefix=LA32
3; RUN: llc --mtriple=loongarch64 -mattr=+d < %s | FileCheck %s --check-prefix=LA64
4
5define i1 @andn_icmp_eq_i8(i8 signext %a, i8 signext %b) nounwind {
6; LA32-LABEL: andn_icmp_eq_i8:
7; LA32:       # %bb.0:
8; LA32-NEXT:    andn $a0, $a1, $a0
9; LA32-NEXT:    sltui $a0, $a0, 1
10; LA32-NEXT:    ret
11;
12; LA64-LABEL: andn_icmp_eq_i8:
13; LA64:       # %bb.0:
14; LA64-NEXT:    andn $a0, $a1, $a0
15; LA64-NEXT:    sltui $a0, $a0, 1
16; LA64-NEXT:    ret
17  %and = and i8 %a, %b
18  %cmpeq = icmp eq i8 %and, %b
19  ret i1 %cmpeq
20}
21
22define i1 @andn_icmp_eq_i16(i16 signext %a, i16 signext %b) nounwind {
23; LA32-LABEL: andn_icmp_eq_i16:
24; LA32:       # %bb.0:
25; LA32-NEXT:    andn $a0, $a1, $a0
26; LA32-NEXT:    sltui $a0, $a0, 1
27; LA32-NEXT:    ret
28;
29; LA64-LABEL: andn_icmp_eq_i16:
30; LA64:       # %bb.0:
31; LA64-NEXT:    andn $a0, $a1, $a0
32; LA64-NEXT:    sltui $a0, $a0, 1
33; LA64-NEXT:    ret
34  %and = and i16 %a, %b
35  %cmpeq = icmp eq i16 %and, %b
36  ret i1 %cmpeq
37}
38
39define i1 @andn_icmp_eq_i32(i32 signext %a, i32 signext %b) nounwind {
40; LA32-LABEL: andn_icmp_eq_i32:
41; LA32:       # %bb.0:
42; LA32-NEXT:    andn $a0, $a1, $a0
43; LA32-NEXT:    sltui $a0, $a0, 1
44; LA32-NEXT:    ret
45;
46; LA64-LABEL: andn_icmp_eq_i32:
47; LA64:       # %bb.0:
48; LA64-NEXT:    andn $a0, $a1, $a0
49; LA64-NEXT:    sltui $a0, $a0, 1
50; LA64-NEXT:    ret
51  %and = and i32 %a, %b
52  %cmpeq = icmp eq i32 %and, %b
53  ret i1 %cmpeq
54}
55
56define i1 @andn_icmp_eq_i64(i64 %a, i64 %b) nounwind {
57; LA32-LABEL: andn_icmp_eq_i64:
58; LA32:       # %bb.0:
59; LA32-NEXT:    andn $a1, $a3, $a1
60; LA32-NEXT:    andn $a0, $a2, $a0
61; LA32-NEXT:    or $a0, $a0, $a1
62; LA32-NEXT:    sltui $a0, $a0, 1
63; LA32-NEXT:    ret
64;
65; LA64-LABEL: andn_icmp_eq_i64:
66; LA64:       # %bb.0:
67; LA64-NEXT:    andn $a0, $a1, $a0
68; LA64-NEXT:    sltui $a0, $a0, 1
69; LA64-NEXT:    ret
70  %and = and i64 %a, %b
71  %cmpeq = icmp eq i64 %and, %b
72  ret i1 %cmpeq
73}
74
75define i1 @andn_icmp_ne_i8(i8 signext %a, i8 signext %b) nounwind {
76; LA32-LABEL: andn_icmp_ne_i8:
77; LA32:       # %bb.0:
78; LA32-NEXT:    andn $a0, $a1, $a0
79; LA32-NEXT:    sltu $a0, $zero, $a0
80; LA32-NEXT:    ret
81;
82; LA64-LABEL: andn_icmp_ne_i8:
83; LA64:       # %bb.0:
84; LA64-NEXT:    andn $a0, $a1, $a0
85; LA64-NEXT:    sltu $a0, $zero, $a0
86; LA64-NEXT:    ret
87  %and = and i8 %a, %b
88  %cmpne = icmp ne i8 %and, %b
89  ret i1 %cmpne
90}
91
92define i1 @andn_icmp_ne_i16(i16 signext %a, i16 signext %b) nounwind {
93; LA32-LABEL: andn_icmp_ne_i16:
94; LA32:       # %bb.0:
95; LA32-NEXT:    andn $a0, $a1, $a0
96; LA32-NEXT:    sltu $a0, $zero, $a0
97; LA32-NEXT:    ret
98;
99; LA64-LABEL: andn_icmp_ne_i16:
100; LA64:       # %bb.0:
101; LA64-NEXT:    andn $a0, $a1, $a0
102; LA64-NEXT:    sltu $a0, $zero, $a0
103; LA64-NEXT:    ret
104  %and = and i16 %a, %b
105  %cmpne = icmp ne i16 %and, %b
106  ret i1 %cmpne
107}
108
109define i1 @andn_icmp_ne_i32(i32 signext %a, i32 signext %b) nounwind {
110; LA32-LABEL: andn_icmp_ne_i32:
111; LA32:       # %bb.0:
112; LA32-NEXT:    andn $a0, $a1, $a0
113; LA32-NEXT:    sltu $a0, $zero, $a0
114; LA32-NEXT:    ret
115;
116; LA64-LABEL: andn_icmp_ne_i32:
117; LA64:       # %bb.0:
118; LA64-NEXT:    andn $a0, $a1, $a0
119; LA64-NEXT:    sltu $a0, $zero, $a0
120; LA64-NEXT:    ret
121  %and = and i32 %a, %b
122  %cmpne = icmp ne i32 %and, %b
123  ret i1 %cmpne
124}
125
126define i1 @andn_icmp_ne_i64(i64 %a, i64 %b) nounwind {
127; LA32-LABEL: andn_icmp_ne_i64:
128; LA32:       # %bb.0:
129; LA32-NEXT:    andn $a1, $a3, $a1
130; LA32-NEXT:    andn $a0, $a2, $a0
131; LA32-NEXT:    or $a0, $a0, $a1
132; LA32-NEXT:    sltu $a0, $zero, $a0
133; LA32-NEXT:    ret
134;
135; LA64-LABEL: andn_icmp_ne_i64:
136; LA64:       # %bb.0:
137; LA64-NEXT:    andn $a0, $a1, $a0
138; LA64-NEXT:    sltu $a0, $zero, $a0
139; LA64-NEXT:    ret
140  %and = and i64 %a, %b
141  %cmpne = icmp ne i64 %and, %b
142  ret i1 %cmpne
143}
144
145define i1 @andn_icmp_ult_i8(i8 signext %a, i8 signext %b) nounwind {
146; LA32-LABEL: andn_icmp_ult_i8:
147; LA32:       # %bb.0:
148; LA32-NEXT:    and $a0, $a0, $a1
149; LA32-NEXT:    sltu $a0, $a0, $a1
150; LA32-NEXT:    ret
151;
152; LA64-LABEL: andn_icmp_ult_i8:
153; LA64:       # %bb.0:
154; LA64-NEXT:    and $a0, $a0, $a1
155; LA64-NEXT:    sltu $a0, $a0, $a1
156; LA64-NEXT:    ret
157  %and = and i8 %a, %b
158  %cmp = icmp ult i8 %and, %b
159  ret i1 %cmp
160}
161
162define i1 @andn_icmp_ult_i16(i16 signext %a, i16 signext %b) nounwind {
163; LA32-LABEL: andn_icmp_ult_i16:
164; LA32:       # %bb.0:
165; LA32-NEXT:    and $a0, $a0, $a1
166; LA32-NEXT:    sltu $a0, $a0, $a1
167; LA32-NEXT:    ret
168;
169; LA64-LABEL: andn_icmp_ult_i16:
170; LA64:       # %bb.0:
171; LA64-NEXT:    and $a0, $a0, $a1
172; LA64-NEXT:    sltu $a0, $a0, $a1
173; LA64-NEXT:    ret
174  %and = and i16 %a, %b
175  %cmp = icmp ult i16 %and, %b
176  ret i1 %cmp
177}
178
179define i1 @andn_icmp_uge_i8(i8 signext %a, i8 signext %b) nounwind {
180; LA32-LABEL: andn_icmp_uge_i8:
181; LA32:       # %bb.0:
182; LA32-NEXT:    and $a0, $a0, $a1
183; LA32-NEXT:    sltu $a0, $a0, $a1
184; LA32-NEXT:    xori $a0, $a0, 1
185; LA32-NEXT:    ret
186;
187; LA64-LABEL: andn_icmp_uge_i8:
188; LA64:       # %bb.0:
189; LA64-NEXT:    and $a0, $a0, $a1
190; LA64-NEXT:    sltu $a0, $a0, $a1
191; LA64-NEXT:    xori $a0, $a0, 1
192; LA64-NEXT:    ret
193  %and = and i8 %a, %b
194  %cmp = icmp uge i8 %and, %b
195  ret i1 %cmp
196}
197
198define i1 @andn_icmp_uge_i16(i16 signext %a, i16 signext %b) nounwind {
199; LA32-LABEL: andn_icmp_uge_i16:
200; LA32:       # %bb.0:
201; LA32-NEXT:    and $a0, $a0, $a1
202; LA32-NEXT:    sltu $a0, $a0, $a1
203; LA32-NEXT:    xori $a0, $a0, 1
204; LA32-NEXT:    ret
205;
206; LA64-LABEL: andn_icmp_uge_i16:
207; LA64:       # %bb.0:
208; LA64-NEXT:    and $a0, $a0, $a1
209; LA64-NEXT:    sltu $a0, $a0, $a1
210; LA64-NEXT:    xori $a0, $a0, 1
211; LA64-NEXT:    ret
212  %and = and i16 %a, %b
213  %cmp = icmp uge i16 %and, %b
214  ret i1 %cmp
215}
216
217define i1 @andn_icmp_ugt_i8(i8 signext %a, i8 signext %b) nounwind {
218; LA32-LABEL: andn_icmp_ugt_i8:
219; LA32:       # %bb.0:
220; LA32-NEXT:    and $a0, $a0, $a1
221; LA32-NEXT:    sltu $a0, $a1, $a0
222; LA32-NEXT:    ret
223;
224; LA64-LABEL: andn_icmp_ugt_i8:
225; LA64:       # %bb.0:
226; LA64-NEXT:    and $a0, $a0, $a1
227; LA64-NEXT:    sltu $a0, $a1, $a0
228; LA64-NEXT:    ret
229  %and = and i8 %a, %b
230  %cmp = icmp ugt i8 %and, %b
231  ret i1 %cmp
232}
233
234define i1 @andn_icmp_ugt_i16(i16 signext %a, i16 signext %b) nounwind {
235; LA32-LABEL: andn_icmp_ugt_i16:
236; LA32:       # %bb.0:
237; LA32-NEXT:    and $a0, $a0, $a1
238; LA32-NEXT:    sltu $a0, $a1, $a0
239; LA32-NEXT:    ret
240;
241; LA64-LABEL: andn_icmp_ugt_i16:
242; LA64:       # %bb.0:
243; LA64-NEXT:    and $a0, $a0, $a1
244; LA64-NEXT:    sltu $a0, $a1, $a0
245; LA64-NEXT:    ret
246  %and = and i16 %a, %b
247  %cmp = icmp ugt i16 %and, %b
248  ret i1 %cmp
249}
250
251define i1 @andn_icmp_ule_i8(i8 signext %a, i8 signext %b) nounwind {
252; LA32-LABEL: andn_icmp_ule_i8:
253; LA32:       # %bb.0:
254; LA32-NEXT:    and $a0, $a0, $a1
255; LA32-NEXT:    sltu $a0, $a1, $a0
256; LA32-NEXT:    xori $a0, $a0, 1
257; LA32-NEXT:    ret
258;
259; LA64-LABEL: andn_icmp_ule_i8:
260; LA64:       # %bb.0:
261; LA64-NEXT:    and $a0, $a0, $a1
262; LA64-NEXT:    sltu $a0, $a1, $a0
263; LA64-NEXT:    xori $a0, $a0, 1
264; LA64-NEXT:    ret
265  %and = and i8 %a, %b
266  %cmp = icmp ule i8 %and, %b
267  ret i1 %cmp
268}
269
270define i1 @andn_icmp_ule_i16(i16 signext %a, i16 signext %b) nounwind {
271; LA32-LABEL: andn_icmp_ule_i16:
272; LA32:       # %bb.0:
273; LA32-NEXT:    and $a0, $a0, $a1
274; LA32-NEXT:    sltu $a0, $a1, $a0
275; LA32-NEXT:    xori $a0, $a0, 1
276; LA32-NEXT:    ret
277;
278; LA64-LABEL: andn_icmp_ule_i16:
279; LA64:       # %bb.0:
280; LA64-NEXT:    and $a0, $a0, $a1
281; LA64-NEXT:    sltu $a0, $a1, $a0
282; LA64-NEXT:    xori $a0, $a0, 1
283; LA64-NEXT:    ret
284  %and = and i16 %a, %b
285  %cmp = icmp ule i16 %and, %b
286  ret i1 %cmp
287}
288
289define i1 @andn_icmp_eq_i8_sz(i8 signext %a, i8 zeroext %b) nounwind {
290; LA32-LABEL: andn_icmp_eq_i8_sz:
291; LA32:       # %bb.0:
292; LA32-NEXT:    andn $a0, $a1, $a0
293; LA32-NEXT:    sltui $a0, $a0, 1
294; LA32-NEXT:    ret
295;
296; LA64-LABEL: andn_icmp_eq_i8_sz:
297; LA64:       # %bb.0:
298; LA64-NEXT:    andn $a0, $a1, $a0
299; LA64-NEXT:    sltui $a0, $a0, 1
300; LA64-NEXT:    ret
301  %and = and i8 %a, %b
302  %cmp = icmp eq i8 %and, %b
303  ret i1 %cmp
304}
305
306define i1 @andn_icmp_eq_i8_zs(i8 zeroext %a, i8 signext %b) nounwind {
307; LA32-LABEL: andn_icmp_eq_i8_zs:
308; LA32:       # %bb.0:
309; LA32-NEXT:    andn $a0, $a1, $a0
310; LA32-NEXT:    andi $a0, $a0, 255
311; LA32-NEXT:    sltui $a0, $a0, 1
312; LA32-NEXT:    ret
313;
314; LA64-LABEL: andn_icmp_eq_i8_zs:
315; LA64:       # %bb.0:
316; LA64-NEXT:    andn $a0, $a1, $a0
317; LA64-NEXT:    andi $a0, $a0, 255
318; LA64-NEXT:    sltui $a0, $a0, 1
319; LA64-NEXT:    ret
320  %and = and i8 %a, %b
321  %cmp = icmp eq i8 %and, %b
322  ret i1 %cmp
323}
324
325define i1 @andn_icmp_eq_i8_zz(i8 zeroext %a, i8 zeroext %b) nounwind {
326; LA32-LABEL: andn_icmp_eq_i8_zz:
327; LA32:       # %bb.0:
328; LA32-NEXT:    andn $a0, $a1, $a0
329; LA32-NEXT:    sltui $a0, $a0, 1
330; LA32-NEXT:    ret
331;
332; LA64-LABEL: andn_icmp_eq_i8_zz:
333; LA64:       # %bb.0:
334; LA64-NEXT:    andn $a0, $a1, $a0
335; LA64-NEXT:    sltui $a0, $a0, 1
336; LA64-NEXT:    ret
337  %and = and i8 %a, %b
338  %cmp = icmp eq i8 %and, %b
339  ret i1 %cmp
340}
341
342define i1 @andn_icmp_eq_i8_sn(i8 signext %a, i8 %b) nounwind {
343; LA32-LABEL: andn_icmp_eq_i8_sn:
344; LA32:       # %bb.0:
345; LA32-NEXT:    andn $a0, $a1, $a0
346; LA32-NEXT:    andi $a0, $a0, 255
347; LA32-NEXT:    sltui $a0, $a0, 1
348; LA32-NEXT:    ret
349;
350; LA64-LABEL: andn_icmp_eq_i8_sn:
351; LA64:       # %bb.0:
352; LA64-NEXT:    andn $a0, $a1, $a0
353; LA64-NEXT:    andi $a0, $a0, 255
354; LA64-NEXT:    sltui $a0, $a0, 1
355; LA64-NEXT:    ret
356  %and = and i8 %a, %b
357  %cmp = icmp eq i8 %and, %b
358  ret i1 %cmp
359}
360
361define i1 @andn_icmp_eq_i8_zn(i8 zeroext %a, i8 %b) nounwind {
362; LA32-LABEL: andn_icmp_eq_i8_zn:
363; LA32:       # %bb.0:
364; LA32-NEXT:    andn $a0, $a1, $a0
365; LA32-NEXT:    andi $a0, $a0, 255
366; LA32-NEXT:    sltui $a0, $a0, 1
367; LA32-NEXT:    ret
368;
369; LA64-LABEL: andn_icmp_eq_i8_zn:
370; LA64:       # %bb.0:
371; LA64-NEXT:    andn $a0, $a1, $a0
372; LA64-NEXT:    andi $a0, $a0, 255
373; LA64-NEXT:    sltui $a0, $a0, 1
374; LA64-NEXT:    ret
375  %and = and i8 %a, %b
376  %cmp = icmp eq i8 %and, %b
377  ret i1 %cmp
378}
379
380define i1 @andn_icmp_eq_i8_ns(i8 %a, i8 signext %b) nounwind {
381; LA32-LABEL: andn_icmp_eq_i8_ns:
382; LA32:       # %bb.0:
383; LA32-NEXT:    andn $a0, $a1, $a0
384; LA32-NEXT:    andi $a0, $a0, 255
385; LA32-NEXT:    sltui $a0, $a0, 1
386; LA32-NEXT:    ret
387;
388; LA64-LABEL: andn_icmp_eq_i8_ns:
389; LA64:       # %bb.0:
390; LA64-NEXT:    andn $a0, $a1, $a0
391; LA64-NEXT:    andi $a0, $a0, 255
392; LA64-NEXT:    sltui $a0, $a0, 1
393; LA64-NEXT:    ret
394  %and = and i8 %a, %b
395  %cmp = icmp eq i8 %and, %b
396  ret i1 %cmp
397}
398
399define i1 @andn_icmp_eq_i8_nz(i8 %a, i8 zeroext %b) nounwind {
400; LA32-LABEL: andn_icmp_eq_i8_nz:
401; LA32:       # %bb.0:
402; LA32-NEXT:    andn $a0, $a1, $a0
403; LA32-NEXT:    sltui $a0, $a0, 1
404; LA32-NEXT:    ret
405;
406; LA64-LABEL: andn_icmp_eq_i8_nz:
407; LA64:       # %bb.0:
408; LA64-NEXT:    andn $a0, $a1, $a0
409; LA64-NEXT:    sltui $a0, $a0, 1
410; LA64-NEXT:    ret
411  %and = and i8 %a, %b
412  %cmp = icmp eq i8 %and, %b
413  ret i1 %cmp
414}
415
416define i1 @andn_icmp_eq_i8_nn(i8 %a, i8 %b) nounwind {
417; LA32-LABEL: andn_icmp_eq_i8_nn:
418; LA32:       # %bb.0:
419; LA32-NEXT:    andn $a0, $a1, $a0
420; LA32-NEXT:    andi $a0, $a0, 255
421; LA32-NEXT:    sltui $a0, $a0, 1
422; LA32-NEXT:    ret
423;
424; LA64-LABEL: andn_icmp_eq_i8_nn:
425; LA64:       # %bb.0:
426; LA64-NEXT:    andn $a0, $a1, $a0
427; LA64-NEXT:    andi $a0, $a0, 255
428; LA64-NEXT:    sltui $a0, $a0, 1
429; LA64-NEXT:    ret
430  %and = and i8 %a, %b
431  %cmp = icmp eq i8 %and, %b
432  ret i1 %cmp
433}
434
435define i1 @andn_icmp_ult_i8_sz(i8 signext %a, i8 zeroext %b) nounwind {
436; LA32-LABEL: andn_icmp_ult_i8_sz:
437; LA32:       # %bb.0:
438; LA32-NEXT:    and $a0, $a0, $a1
439; LA32-NEXT:    sltu $a0, $a0, $a1
440; LA32-NEXT:    ret
441;
442; LA64-LABEL: andn_icmp_ult_i8_sz:
443; LA64:       # %bb.0:
444; LA64-NEXT:    and $a0, $a0, $a1
445; LA64-NEXT:    sltu $a0, $a0, $a1
446; LA64-NEXT:    ret
447  %and = and i8 %a, %b
448  %cmp = icmp ult i8 %and, %b
449  ret i1 %cmp
450}
451
452define i1 @andn_icmp_ult_i8_zs(i8 zeroext %a, i8 signext %b) nounwind {
453; LA32-LABEL: andn_icmp_ult_i8_zs:
454; LA32:       # %bb.0:
455; LA32-NEXT:    andi $a1, $a1, 255
456; LA32-NEXT:    and $a0, $a0, $a1
457; LA32-NEXT:    sltu $a0, $a0, $a1
458; LA32-NEXT:    ret
459;
460; LA64-LABEL: andn_icmp_ult_i8_zs:
461; LA64:       # %bb.0:
462; LA64-NEXT:    andi $a1, $a1, 255
463; LA64-NEXT:    and $a0, $a0, $a1
464; LA64-NEXT:    sltu $a0, $a0, $a1
465; LA64-NEXT:    ret
466  %and = and i8 %a, %b
467  %cmp = icmp ult i8 %and, %b
468  ret i1 %cmp
469}
470
471define i1 @andn_icmp_ult_i8_zz(i8 zeroext %a, i8 zeroext %b) nounwind {
472; LA32-LABEL: andn_icmp_ult_i8_zz:
473; LA32:       # %bb.0:
474; LA32-NEXT:    and $a0, $a0, $a1
475; LA32-NEXT:    sltu $a0, $a0, $a1
476; LA32-NEXT:    ret
477;
478; LA64-LABEL: andn_icmp_ult_i8_zz:
479; LA64:       # %bb.0:
480; LA64-NEXT:    and $a0, $a0, $a1
481; LA64-NEXT:    sltu $a0, $a0, $a1
482; LA64-NEXT:    ret
483  %and = and i8 %a, %b
484  %cmp = icmp ult i8 %and, %b
485  ret i1 %cmp
486}
487
488define i1 @andn_icmp_ult_i8_sn(i8 signext %a, i8 %b) nounwind {
489; LA32-LABEL: andn_icmp_ult_i8_sn:
490; LA32:       # %bb.0:
491; LA32-NEXT:    andi $a1, $a1, 255
492; LA32-NEXT:    and $a0, $a1, $a0
493; LA32-NEXT:    sltu $a0, $a0, $a1
494; LA32-NEXT:    ret
495;
496; LA64-LABEL: andn_icmp_ult_i8_sn:
497; LA64:       # %bb.0:
498; LA64-NEXT:    andi $a1, $a1, 255
499; LA64-NEXT:    and $a0, $a1, $a0
500; LA64-NEXT:    sltu $a0, $a0, $a1
501; LA64-NEXT:    ret
502  %and = and i8 %a, %b
503  %cmp = icmp ult i8 %and, %b
504  ret i1 %cmp
505}
506
507define i1 @andn_icmp_ult_i8_zn(i8 zeroext %a, i8 %b) nounwind {
508; LA32-LABEL: andn_icmp_ult_i8_zn:
509; LA32:       # %bb.0:
510; LA32-NEXT:    andi $a1, $a1, 255
511; LA32-NEXT:    and $a0, $a1, $a0
512; LA32-NEXT:    sltu $a0, $a0, $a1
513; LA32-NEXT:    ret
514;
515; LA64-LABEL: andn_icmp_ult_i8_zn:
516; LA64:       # %bb.0:
517; LA64-NEXT:    andi $a1, $a1, 255
518; LA64-NEXT:    and $a0, $a1, $a0
519; LA64-NEXT:    sltu $a0, $a0, $a1
520; LA64-NEXT:    ret
521  %and = and i8 %a, %b
522  %cmp = icmp ult i8 %and, %b
523  ret i1 %cmp
524}
525
526define i1 @andn_icmp_ult_i8_ns(i8 %a, i8 signext %b) nounwind {
527; LA32-LABEL: andn_icmp_ult_i8_ns:
528; LA32:       # %bb.0:
529; LA32-NEXT:    andi $a1, $a1, 255
530; LA32-NEXT:    and $a0, $a1, $a0
531; LA32-NEXT:    sltu $a0, $a0, $a1
532; LA32-NEXT:    ret
533;
534; LA64-LABEL: andn_icmp_ult_i8_ns:
535; LA64:       # %bb.0:
536; LA64-NEXT:    andi $a1, $a1, 255
537; LA64-NEXT:    and $a0, $a1, $a0
538; LA64-NEXT:    sltu $a0, $a0, $a1
539; LA64-NEXT:    ret
540  %and = and i8 %a, %b
541  %cmp = icmp ult i8 %and, %b
542  ret i1 %cmp
543}
544
545define i1 @andn_icmp_ult_i8_nz(i8 %a, i8 zeroext %b) nounwind {
546; LA32-LABEL: andn_icmp_ult_i8_nz:
547; LA32:       # %bb.0:
548; LA32-NEXT:    and $a0, $a0, $a1
549; LA32-NEXT:    sltu $a0, $a0, $a1
550; LA32-NEXT:    ret
551;
552; LA64-LABEL: andn_icmp_ult_i8_nz:
553; LA64:       # %bb.0:
554; LA64-NEXT:    and $a0, $a0, $a1
555; LA64-NEXT:    sltu $a0, $a0, $a1
556; LA64-NEXT:    ret
557  %and = and i8 %a, %b
558  %cmp = icmp ult i8 %and, %b
559  ret i1 %cmp
560}
561
562define i1 @andn_icmp_ult_i8_nn(i8 %a, i8 %b) nounwind {
563; LA32-LABEL: andn_icmp_ult_i8_nn:
564; LA32:       # %bb.0:
565; LA32-NEXT:    andi $a1, $a1, 255
566; LA32-NEXT:    and $a0, $a1, $a0
567; LA32-NEXT:    sltu $a0, $a0, $a1
568; LA32-NEXT:    ret
569;
570; LA64-LABEL: andn_icmp_ult_i8_nn:
571; LA64:       # %bb.0:
572; LA64-NEXT:    andi $a1, $a1, 255
573; LA64-NEXT:    and $a0, $a1, $a0
574; LA64-NEXT:    sltu $a0, $a0, $a1
575; LA64-NEXT:    ret
576  %and = and i8 %a, %b
577  %cmp = icmp ult i8 %and, %b
578  ret i1 %cmp
579}
580
581define i1 @andn_icmp_eq_i8_i32(i8 signext %a, i8 signext %b) nounwind {
582; LA32-LABEL: andn_icmp_eq_i8_i32:
583; LA32:       # %bb.0:
584; LA32-NEXT:    andn $a0, $a1, $a0
585; LA32-NEXT:    sltui $a0, $a0, 1
586; LA32-NEXT:    ret
587;
588; LA64-LABEL: andn_icmp_eq_i8_i32:
589; LA64:       # %bb.0:
590; LA64-NEXT:    andn $a0, $a1, $a0
591; LA64-NEXT:    andi $a0, $a0, 255
592; LA64-NEXT:    sltui $a0, $a0, 1
593; LA64-NEXT:    ret
594  %x = zext i8 %a to i32
595  %y = zext i8 %b to i32
596  %not = xor i32 %x, -1
597  %and = and i32 %not, %y
598  %cmp = icmp eq i32 %and, 0
599  ret i1 %cmp
600}
601