xref: /llvm-project/llvm/test/CodeGen/LoongArch/alsl.ll (revision 718331f55529469586c99a55e4b382a1c7485842)
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc --mtriple=loongarch32 -mattr=+d < %s | FileCheck %s --check-prefix=LA32
3; RUN: llc --mtriple=loongarch64 -mattr=+d < %s | FileCheck %s --check-prefix=LA64
4
5define i8 @alsl_i8(i8 signext %a, i8 signext %b) nounwind {
6; LA32-LABEL: alsl_i8:
7; LA32:       # %bb.0: # %entry
8; LA32-NEXT:    alsl.w $a0, $a0, $a1, 1
9; LA32-NEXT:    ret
10;
11; LA64-LABEL: alsl_i8:
12; LA64:       # %bb.0: # %entry
13; LA64-NEXT:    alsl.d $a0, $a0, $a1, 1
14; LA64-NEXT:    ret
15entry:
16  %mul = mul nsw i8 %a, 2
17  %add = add nsw i8 %b, %mul
18  ret i8 %add
19}
20
21define i16 @alsl_i16(i16 signext %a, i16 signext %b) nounwind {
22; LA32-LABEL: alsl_i16:
23; LA32:       # %bb.0: # %entry
24; LA32-NEXT:    alsl.w $a0, $a0, $a1, 2
25; LA32-NEXT:    ret
26;
27; LA64-LABEL: alsl_i16:
28; LA64:       # %bb.0: # %entry
29; LA64-NEXT:    alsl.d $a0, $a0, $a1, 2
30; LA64-NEXT:    ret
31entry:
32  %mul = mul nsw i16 %a, 4
33  %add = add nsw i16 %b, %mul
34  ret i16 %add
35}
36
37define i32 @alsl_i32(i32 signext %a, i32 signext %b) nounwind {
38; LA32-LABEL: alsl_i32:
39; LA32:       # %bb.0: # %entry
40; LA32-NEXT:    alsl.w $a0, $a0, $a1, 3
41; LA32-NEXT:    ret
42;
43; LA64-LABEL: alsl_i32:
44; LA64:       # %bb.0: # %entry
45; LA64-NEXT:    alsl.w $a0, $a0, $a1, 3
46; LA64-NEXT:    ret
47entry:
48  %mul = mul nsw i32 %a, 8
49  %add = add nsw i32 %b, %mul
50  ret i32 %add
51}
52
53define i64 @alsl_i64(i64 signext %a, i64 signext %b) nounwind {
54; LA32-LABEL: alsl_i64:
55; LA32:       # %bb.0: # %entry
56; LA32-NEXT:    srli.w $a4, $a0, 28
57; LA32-NEXT:    slli.w $a1, $a1, 4
58; LA32-NEXT:    or $a1, $a1, $a4
59; LA32-NEXT:    alsl.w $a0, $a0, $a2, 4
60; LA32-NEXT:    sltu $a2, $a0, $a2
61; LA32-NEXT:    add.w $a1, $a3, $a1
62; LA32-NEXT:    add.w $a1, $a1, $a2
63; LA32-NEXT:    ret
64;
65; LA64-LABEL: alsl_i64:
66; LA64:       # %bb.0: # %entry
67; LA64-NEXT:    alsl.d $a0, $a0, $a1, 4
68; LA64-NEXT:    ret
69entry:
70  %mul = mul nsw i64 %a, 16
71  %add = add nsw i64 %b, %mul
72  ret i64 %add
73}
74
75define i32 @alsl_zext_i8(i8 signext %a, i8 signext %b) nounwind {
76; LA32-LABEL: alsl_zext_i8:
77; LA32:       # %bb.0: # %entry
78; LA32-NEXT:    alsl.w $a0, $a0, $a1, 1
79; LA32-NEXT:    andi $a0, $a0, 255
80; LA32-NEXT:    ret
81;
82; LA64-LABEL: alsl_zext_i8:
83; LA64:       # %bb.0: # %entry
84; LA64-NEXT:    alsl.d $a0, $a0, $a1, 1
85; LA64-NEXT:    andi $a0, $a0, 255
86; LA64-NEXT:    ret
87entry:
88  %mul = mul nsw i8 %a, 2
89  %add = add nsw i8 %b, %mul
90  %zext = zext i8 %add to i32
91  ret i32 %zext
92}
93
94define i32 @alsl_zext_i16(i16 signext %a, i16 signext %b) nounwind {
95; LA32-LABEL: alsl_zext_i16:
96; LA32:       # %bb.0: # %entry
97; LA32-NEXT:    alsl.w $a0, $a0, $a1, 2
98; LA32-NEXT:    bstrpick.w $a0, $a0, 15, 0
99; LA32-NEXT:    ret
100;
101; LA64-LABEL: alsl_zext_i16:
102; LA64:       # %bb.0: # %entry
103; LA64-NEXT:    alsl.d $a0, $a0, $a1, 2
104; LA64-NEXT:    bstrpick.d $a0, $a0, 15, 0
105; LA64-NEXT:    ret
106entry:
107  %mul = mul nsw i16 %a, 4
108  %add = add nsw i16 %b, %mul
109  %zext = zext i16 %add to i32
110  ret i32 %zext
111}
112
113define i64 @alsl_zext_i32(i32 signext %a, i32 signext %b) nounwind {
114; LA32-LABEL: alsl_zext_i32:
115; LA32:       # %bb.0: # %entry
116; LA32-NEXT:    alsl.w $a0, $a0, $a1, 3
117; LA32-NEXT:    move $a1, $zero
118; LA32-NEXT:    ret
119;
120; LA64-LABEL: alsl_zext_i32:
121; LA64:       # %bb.0: # %entry
122; LA64-NEXT:    alsl.wu $a0, $a0, $a1, 3
123; LA64-NEXT:    ret
124entry:
125  %mul = mul nsw i32 %a, 8
126  %add = add nsw i32 %b, %mul
127  %zext = zext i32 %add to i64
128  ret i64 %zext
129}
130
131define i8 @mul_add_i8(i8 signext %a, i8 signext %b) nounwind {
132; LA32-LABEL: mul_add_i8:
133; LA32:       # %bb.0: # %entry
134; LA32-NEXT:    alsl.w $a0, $a0, $a0, 1
135; LA32-NEXT:    add.w $a0, $a1, $a0
136; LA32-NEXT:    ret
137;
138; LA64-LABEL: mul_add_i8:
139; LA64:       # %bb.0: # %entry
140; LA64-NEXT:    alsl.d $a0, $a0, $a0, 1
141; LA64-NEXT:    add.d $a0, $a1, $a0
142; LA64-NEXT:    ret
143entry:
144  %mul = mul nsw i8 %a, 3
145  %add = add nsw i8 %b, %mul
146  ret i8 %add
147}
148
149define i16 @mul_add_i16(i16 signext %a, i16 signext %b) nounwind {
150; LA32-LABEL: mul_add_i16:
151; LA32:       # %bb.0: # %entry
152; LA32-NEXT:    slli.w $a2, $a0, 3
153; LA32-NEXT:    alsl.w $a0, $a0, $a2, 1
154; LA32-NEXT:    add.w $a0, $a1, $a0
155; LA32-NEXT:    ret
156;
157; LA64-LABEL: mul_add_i16:
158; LA64:       # %bb.0: # %entry
159; LA64-NEXT:    slli.d $a2, $a0, 3
160; LA64-NEXT:    alsl.d $a0, $a0, $a2, 1
161; LA64-NEXT:    add.d $a0, $a1, $a0
162; LA64-NEXT:    ret
163entry:
164  %mul = mul nsw i16 %a, 10
165  %add = add nsw i16 %b, %mul
166  ret i16 %add
167}
168
169define i32 @mul_add_i32(i32 signext %a, i32 signext %b) nounwind {
170; LA32-LABEL: mul_add_i32:
171; LA32:       # %bb.0: # %entry
172; LA32-NEXT:    slli.w $a2, $a0, 3
173; LA32-NEXT:    alsl.w $a0, $a0, $a2, 2
174; LA32-NEXT:    add.w $a0, $a1, $a0
175; LA32-NEXT:    ret
176;
177; LA64-LABEL: mul_add_i32:
178; LA64:       # %bb.0: # %entry
179; LA64-NEXT:    slli.d $a2, $a0, 3
180; LA64-NEXT:    alsl.d $a0, $a0, $a2, 2
181; LA64-NEXT:    add.w $a0, $a1, $a0
182; LA64-NEXT:    ret
183entry:
184  %mul = mul nsw i32 %a, 12
185  %add = add nsw i32 %b, %mul
186  ret i32 %add
187}
188
189define i64 @mul_add_i64(i64 signext %a, i64 signext %b) nounwind {
190; LA32-LABEL: mul_add_i64:
191; LA32:       # %bb.0: # %entry
192; LA32-NEXT:    ori $a4, $zero, 15
193; LA32-NEXT:    mulh.wu $a4, $a0, $a4
194; LA32-NEXT:    slli.w $a5, $a1, 4
195; LA32-NEXT:    sub.w $a1, $a5, $a1
196; LA32-NEXT:    add.w $a1, $a4, $a1
197; LA32-NEXT:    slli.w $a4, $a0, 4
198; LA32-NEXT:    sub.w $a0, $a4, $a0
199; LA32-NEXT:    add.w $a1, $a3, $a1
200; LA32-NEXT:    add.w $a0, $a2, $a0
201; LA32-NEXT:    sltu $a2, $a0, $a2
202; LA32-NEXT:    add.w $a1, $a1, $a2
203; LA32-NEXT:    ret
204;
205; LA64-LABEL: mul_add_i64:
206; LA64:       # %bb.0: # %entry
207; LA64-NEXT:    slli.d $a2, $a0, 4
208; LA64-NEXT:    sub.d $a0, $a2, $a0
209; LA64-NEXT:    add.d $a0, $a1, $a0
210; LA64-NEXT:    ret
211entry:
212  %mul = mul nsw i64 %a, 15
213  %add = add nsw i64 %b, %mul
214  ret i64 %add
215}
216
217define i32 @mul_add_zext_i8(i8 signext %a, i8 signext %b) nounwind {
218; LA32-LABEL: mul_add_zext_i8:
219; LA32:       # %bb.0: # %entry
220; LA32-NEXT:    alsl.w $a0, $a0, $a0, 2
221; LA32-NEXT:    add.w $a0, $a1, $a0
222; LA32-NEXT:    andi $a0, $a0, 255
223; LA32-NEXT:    ret
224;
225; LA64-LABEL: mul_add_zext_i8:
226; LA64:       # %bb.0: # %entry
227; LA64-NEXT:    alsl.d $a0, $a0, $a0, 2
228; LA64-NEXT:    add.d $a0, $a1, $a0
229; LA64-NEXT:    andi $a0, $a0, 255
230; LA64-NEXT:    ret
231entry:
232  %mul = mul nsw i8 %a, 5
233  %add = add nsw i8 %b, %mul
234  %zext = zext i8 %add to i32
235  ret i32 %zext
236}
237
238define i32 @mul_add_zext_i16(i16 signext %a, i16 signext %b) nounwind {
239; LA32-LABEL: mul_add_zext_i16:
240; LA32:       # %bb.0: # %entry
241; LA32-NEXT:    slli.w $a2, $a0, 4
242; LA32-NEXT:    sub.w $a0, $a2, $a0
243; LA32-NEXT:    add.w $a0, $a1, $a0
244; LA32-NEXT:    bstrpick.w $a0, $a0, 15, 0
245; LA32-NEXT:    ret
246;
247; LA64-LABEL: mul_add_zext_i16:
248; LA64:       # %bb.0: # %entry
249; LA64-NEXT:    slli.d $a2, $a0, 4
250; LA64-NEXT:    sub.d $a0, $a2, $a0
251; LA64-NEXT:    add.d $a0, $a1, $a0
252; LA64-NEXT:    bstrpick.d $a0, $a0, 15, 0
253; LA64-NEXT:    ret
254entry:
255  %mul = mul nsw i16 %a, 15
256  %add = add nsw i16 %b, %mul
257  %zext = zext i16 %add to i32
258  ret i32 %zext
259}
260
261define i64 @mul_add_zext_i32(i32 signext %a, i32 signext %b) nounwind {
262; LA32-LABEL: mul_add_zext_i32:
263; LA32:       # %bb.0: # %entry
264; LA32-NEXT:    alsl.w $a0, $a0, $a0, 2
265; LA32-NEXT:    add.w $a0, $a1, $a0
266; LA32-NEXT:    move $a1, $zero
267; LA32-NEXT:    ret
268;
269; LA64-LABEL: mul_add_zext_i32:
270; LA64:       # %bb.0: # %entry
271; LA64-NEXT:    alsl.d $a0, $a0, $a0, 2
272; LA64-NEXT:    add.d $a0, $a1, $a0
273; LA64-NEXT:    bstrpick.d $a0, $a0, 31, 0
274; LA64-NEXT:    ret
275entry:
276  %mul = mul nsw i32 %a, 5
277  %add = add nsw i32 %b, %mul
278  %zext = zext i32 %add to i64
279  ret i64 %zext
280}
281
282define i8 @alsl_neg_i8(i8 signext %a, i8 signext %b) nounwind {
283; LA32-LABEL: alsl_neg_i8:
284; LA32:       # %bb.0: # %entry
285; LA32-NEXT:    alsl.w $a0, $a0, $a0, 1
286; LA32-NEXT:    sub.w $a0, $a1, $a0
287; LA32-NEXT:    ret
288;
289; LA64-LABEL: alsl_neg_i8:
290; LA64:       # %bb.0: # %entry
291; LA64-NEXT:    alsl.d $a0, $a0, $a0, 1
292; LA64-NEXT:    sub.d $a0, $a1, $a0
293; LA64-NEXT:    ret
294entry:
295  %mul = mul nsw i8 %a, -3
296  %add = add nsw i8 %b, %mul
297  ret i8 %add
298}
299
300define i16 @alsl_neg_i16(i16 signext %a, i16 signext %b) nounwind {
301; LA32-LABEL: alsl_neg_i16:
302; LA32:       # %bb.0: # %entry
303; LA32-NEXT:    alsl.w $a0, $a0, $a0, 2
304; LA32-NEXT:    sub.w $a0, $a1, $a0
305; LA32-NEXT:    ret
306;
307; LA64-LABEL: alsl_neg_i16:
308; LA64:       # %bb.0: # %entry
309; LA64-NEXT:    alsl.d $a0, $a0, $a0, 2
310; LA64-NEXT:    sub.d $a0, $a1, $a0
311; LA64-NEXT:    ret
312entry:
313  %mul = mul nsw i16 %a, -5
314  %add = add nsw i16 %b, %mul
315  ret i16 %add
316}
317
318define i32 @alsl_neg_i32(i32 signext %a, i32 signext %b) nounwind {
319; LA32-LABEL: alsl_neg_i32:
320; LA32:       # %bb.0: # %entry
321; LA32-NEXT:    alsl.w $a0, $a0, $a0, 3
322; LA32-NEXT:    sub.w $a0, $a1, $a0
323; LA32-NEXT:    ret
324;
325; LA64-LABEL: alsl_neg_i32:
326; LA64:       # %bb.0: # %entry
327; LA64-NEXT:    alsl.d $a0, $a0, $a0, 3
328; LA64-NEXT:    sub.w $a0, $a1, $a0
329; LA64-NEXT:    ret
330entry:
331  %mul = mul nsw i32 %a, -9
332  %add = add nsw i32 %b, %mul
333  ret i32 %add
334}
335
336define i64 @mul_add_neg_i64(i64 signext %a, i64 signext %b) nounwind {
337; LA32-LABEL: mul_add_neg_i64:
338; LA32:       # %bb.0: # %entry
339; LA32-NEXT:    slli.w $a4, $a1, 4
340; LA32-NEXT:    sub.w $a1, $a1, $a4
341; LA32-NEXT:    addi.w $a4, $zero, -15
342; LA32-NEXT:    mulh.wu $a4, $a0, $a4
343; LA32-NEXT:    sub.w $a4, $a4, $a0
344; LA32-NEXT:    add.w $a1, $a4, $a1
345; LA32-NEXT:    slli.w $a4, $a0, 4
346; LA32-NEXT:    sub.w $a0, $a0, $a4
347; LA32-NEXT:    add.w $a1, $a3, $a1
348; LA32-NEXT:    add.w $a0, $a2, $a0
349; LA32-NEXT:    sltu $a2, $a0, $a2
350; LA32-NEXT:    add.w $a1, $a1, $a2
351; LA32-NEXT:    ret
352;
353; LA64-LABEL: mul_add_neg_i64:
354; LA64:       # %bb.0: # %entry
355; LA64-NEXT:    slli.d $a2, $a0, 4
356; LA64-NEXT:    sub.d $a0, $a0, $a2
357; LA64-NEXT:    add.d $a0, $a1, $a0
358; LA64-NEXT:    ret
359entry:
360  %mul = mul nsw i64 %a, -15
361  %add = add nsw i64 %b, %mul
362  ret i64 %add
363}
364