1; RUN: llc -mtriple=hexagon -mcpu=hexagonv62 -mtriple=hexagon-unknown-linux-musl -O0 < %s | FileCheck %s 2 3; CHECK-LABEL: foo: 4 5; Check Function prologue. 6; Note. All register numbers and offset are fixed. 7; Hence, no need of regular expression. 8 9; CHECK: r29 = add(r29,#-8) 10; CHECK: memw(r29+#4) = r5 11; CHECK: r29 = add(r29,#8) 12 13%struct.AAA = type { i32, i32, i32, i32 } 14%struct.__va_list_tag = type { ptr, ptr, ptr } 15 16@aaa = global %struct.AAA { i32 100, i32 200, i32 300, i32 400 }, align 4 17@.str = private unnamed_addr constant [13 x i8] c"result = %d\0A\00", align 1 18 19; Function Attrs: nounwind 20define i32 @foo(i32 %xx, i32 %a, i32 %b, i32 %c, i32 %x, ...) #0 { 21entry: 22 %xx.addr = alloca i32, align 4 23 %a.addr = alloca i32, align 4 24 %b.addr = alloca i32, align 4 25 %c.addr = alloca i32, align 4 26 %x.addr = alloca i32, align 4 27 %ap = alloca [1 x %struct.__va_list_tag], align 8 28 %d = alloca i32, align 4 29 %ret = alloca i32, align 4 30 %bbb = alloca %struct.AAA, align 4 31 store i32 %xx, ptr %xx.addr, align 4 32 store i32 %a, ptr %a.addr, align 4 33 store i32 %b, ptr %b.addr, align 4 34 store i32 %c, ptr %c.addr, align 4 35 store i32 %x, ptr %x.addr, align 4 36 store i32 0, ptr %ret, align 4 37 call void @llvm.va_start(ptr %ap) 38 br label %vaarg.maybe_reg 39 40vaarg.maybe_reg: ; preds = %entry 41 %__current_saved_reg_area_pointer = load ptr, ptr %ap 42 %__saved_reg_area_end_pointer_p = getelementptr inbounds %struct.__va_list_tag, ptr %ap, i32 0, i32 1 43 %__saved_reg_area_end_pointer = load ptr, ptr %__saved_reg_area_end_pointer_p 44 %0 = ptrtoint ptr %__current_saved_reg_area_pointer to i32 45 %align_current_saved_reg_area_pointer = add i32 %0, 7 46 %align_current_saved_reg_area_pointer3 = and i32 %align_current_saved_reg_area_pointer, -8 47 %align_current_saved_reg_area_pointer4 = inttoptr i32 %align_current_saved_reg_area_pointer3 to ptr 48 %__new_saved_reg_area_pointer = getelementptr i8, ptr %align_current_saved_reg_area_pointer4, i32 8 49 %1 = icmp sgt ptr %__new_saved_reg_area_pointer, %__saved_reg_area_end_pointer 50 br i1 %1, label %vaarg.on_stack, label %vaarg.in_reg 51 52vaarg.in_reg: ; preds = %vaarg.maybe_reg 53 store ptr %__new_saved_reg_area_pointer, ptr %ap 54 br label %vaarg.end 55 56vaarg.on_stack: ; preds = %vaarg.maybe_reg 57 %__overflow_area_pointer_p = getelementptr inbounds %struct.__va_list_tag, ptr %ap, i32 0, i32 2 58 %__overflow_area_pointer = load ptr, ptr %__overflow_area_pointer_p 59 %2 = ptrtoint ptr %__overflow_area_pointer to i32 60 %align_overflow_area_pointer = add i32 %2, 7 61 %align_overflow_area_pointer5 = and i32 %align_overflow_area_pointer, -8 62 %align_overflow_area_pointer6 = inttoptr i32 %align_overflow_area_pointer5 to ptr 63 %__overflow_area_pointer.next = getelementptr i8, ptr %align_overflow_area_pointer6, i32 8 64 store ptr %__overflow_area_pointer.next, ptr %__overflow_area_pointer_p 65 store ptr %__overflow_area_pointer.next, ptr %ap 66 br label %vaarg.end 67 68vaarg.end: ; preds = %vaarg.on_stack, %vaarg.in_reg 69 %vaarg.addr = phi ptr [ %align_current_saved_reg_area_pointer4, %vaarg.in_reg ], [ %align_overflow_area_pointer6, %vaarg.on_stack ] 70 %3 = load i64, ptr %vaarg.addr 71 %conv = trunc i64 %3 to i32 72 store i32 %conv, ptr %d, align 4 73 %4 = load i32, ptr %d, align 4 74 %5 = load i32, ptr %ret, align 4 75 %add = add nsw i32 %5, %4 76 store i32 %add, ptr %ret, align 4 77 %__overflow_area_pointer_p8 = getelementptr inbounds %struct.__va_list_tag, ptr %ap, i32 0, i32 2 78 %__overflow_area_pointer9 = load ptr, ptr %__overflow_area_pointer_p8 79 %__overflow_area_pointer.next10 = getelementptr i8, ptr %__overflow_area_pointer9, i32 16 80 store ptr %__overflow_area_pointer.next10, ptr %__overflow_area_pointer_p8 81 call void @llvm.memcpy.p0.p0.i32(ptr %bbb, ptr %__overflow_area_pointer9, i32 16, i32 4, i1 false) 82 %d11 = getelementptr inbounds %struct.AAA, ptr %bbb, i32 0, i32 3 83 %6 = load i32, ptr %d11, align 4 84 %7 = load i32, ptr %ret, align 4 85 %add12 = add nsw i32 %7, %6 86 store i32 %add12, ptr %ret, align 4 87 br label %vaarg.maybe_reg14 88 89vaarg.maybe_reg14: ; preds = %vaarg.end 90 %__current_saved_reg_area_pointer16 = load ptr, ptr %ap 91 %__saved_reg_area_end_pointer_p17 = getelementptr inbounds %struct.__va_list_tag, ptr %ap, i32 0, i32 1 92 %__saved_reg_area_end_pointer18 = load ptr, ptr %__saved_reg_area_end_pointer_p17 93 %__new_saved_reg_area_pointer19 = getelementptr i8, ptr %__current_saved_reg_area_pointer16, i32 4 94 %8 = icmp sgt ptr %__new_saved_reg_area_pointer19, %__saved_reg_area_end_pointer18 95 br i1 %8, label %vaarg.on_stack21, label %vaarg.in_reg20 96 97vaarg.in_reg20: ; preds = %vaarg.maybe_reg14 98 store ptr %__new_saved_reg_area_pointer19, ptr %ap 99 br label %vaarg.end25 100 101vaarg.on_stack21: ; preds = %vaarg.maybe_reg14 102 %__overflow_area_pointer_p22 = getelementptr inbounds %struct.__va_list_tag, ptr %ap, i32 0, i32 2 103 %__overflow_area_pointer23 = load ptr, ptr %__overflow_area_pointer_p22 104 %__overflow_area_pointer.next24 = getelementptr i8, ptr %__overflow_area_pointer23, i32 4 105 store ptr %__overflow_area_pointer.next24, ptr %__overflow_area_pointer_p22 106 store ptr %__overflow_area_pointer.next24, ptr %ap 107 br label %vaarg.end25 108 109vaarg.end25: ; preds = %vaarg.on_stack21, %vaarg.in_reg20 110 %vaarg.addr26 = phi ptr [ %__current_saved_reg_area_pointer16, %vaarg.in_reg20 ], [ %__overflow_area_pointer23, %vaarg.on_stack21 ] 111 %9 = load i32, ptr %vaarg.addr26 112 store i32 %9, ptr %d, align 4 113 %10 = load i32, ptr %d, align 4 114 %11 = load i32, ptr %ret, align 4 115 %add27 = add nsw i32 %11, %10 116 store i32 %add27, ptr %ret, align 4 117 br label %vaarg.maybe_reg29 118 119vaarg.maybe_reg29: ; preds = %vaarg.end25 120 %__current_saved_reg_area_pointer31 = load ptr, ptr %ap 121 %__saved_reg_area_end_pointer_p32 = getelementptr inbounds %struct.__va_list_tag, ptr %ap, i32 0, i32 1 122 %__saved_reg_area_end_pointer33 = load ptr, ptr %__saved_reg_area_end_pointer_p32 123 %12 = ptrtoint ptr %__current_saved_reg_area_pointer31 to i32 124 %align_current_saved_reg_area_pointer34 = add i32 %12, 7 125 %align_current_saved_reg_area_pointer35 = and i32 %align_current_saved_reg_area_pointer34, -8 126 %align_current_saved_reg_area_pointer36 = inttoptr i32 %align_current_saved_reg_area_pointer35 to ptr 127 %__new_saved_reg_area_pointer37 = getelementptr i8, ptr %align_current_saved_reg_area_pointer36, i32 8 128 %13 = icmp sgt ptr %__new_saved_reg_area_pointer37, %__saved_reg_area_end_pointer33 129 br i1 %13, label %vaarg.on_stack39, label %vaarg.in_reg38 130 131vaarg.in_reg38: ; preds = %vaarg.maybe_reg29 132 store ptr %__new_saved_reg_area_pointer37, ptr %ap 133 br label %vaarg.end46 134 135vaarg.on_stack39: ; preds = %vaarg.maybe_reg29 136 %__overflow_area_pointer_p40 = getelementptr inbounds %struct.__va_list_tag, ptr %ap, i32 0, i32 2 137 %__overflow_area_pointer41 = load ptr, ptr %__overflow_area_pointer_p40 138 %14 = ptrtoint ptr %__overflow_area_pointer41 to i32 139 %align_overflow_area_pointer42 = add i32 %14, 7 140 %align_overflow_area_pointer43 = and i32 %align_overflow_area_pointer42, -8 141 %align_overflow_area_pointer44 = inttoptr i32 %align_overflow_area_pointer43 to ptr 142 %__overflow_area_pointer.next45 = getelementptr i8, ptr %align_overflow_area_pointer44, i32 8 143 store ptr %__overflow_area_pointer.next45, ptr %__overflow_area_pointer_p40 144 store ptr %__overflow_area_pointer.next45, ptr %ap 145 br label %vaarg.end46 146 147vaarg.end46: ; preds = %vaarg.on_stack39, %vaarg.in_reg38 148 %vaarg.addr47 = phi ptr [ %align_current_saved_reg_area_pointer36, %vaarg.in_reg38 ], [ %align_overflow_area_pointer44, %vaarg.on_stack39 ] 149 %15 = load i64, ptr %vaarg.addr47 150 %conv48 = trunc i64 %15 to i32 151 store i32 %conv48, ptr %d, align 4 152 %16 = load i32, ptr %d, align 4 153 %17 = load i32, ptr %ret, align 4 154 %add49 = add nsw i32 %17, %16 155 store i32 %add49, ptr %ret, align 4 156 call void @llvm.va_end(ptr %ap) 157 %18 = load i32, ptr %ret, align 4 158 ret i32 %18 159} 160 161; Function Attrs: nounwind 162declare void @llvm.va_start(ptr) #1 163 164; Function Attrs: nounwind 165declare void @llvm.memcpy.p0.p0.i32(ptr nocapture, ptr nocapture readonly, i32, i32, i1) #1 166 167; Function Attrs: nounwind 168declare void @llvm.va_end(ptr) #1 169 170; Function Attrs: nounwind 171define i32 @main() #0 { 172entry: 173 %retval = alloca i32, align 4 174 %x = alloca i32, align 4 175 %y = alloca i64, align 8 176 store i32 0, ptr %retval 177 store i64 1000000, ptr %y, align 8 178 %0 = load i64, ptr %y, align 8 179 %1 = load i64, ptr %y, align 8 180 %call = call i32 (i32, i32, i32, i32, i32, ...) @foo(i32 1, i32 2, i32 3, i32 4, i32 5, i64 %0, ptr byval(%struct.AAA) align 4 @aaa, i32 4, i64 %1) 181 store i32 %call, ptr %x, align 4 182 %2 = load i32, ptr %x, align 4 183 %call1 = call i32 (ptr, ...) @printf(ptr @.str, i32 %2) 184 %3 = load i32, ptr %x, align 4 185 ret i32 %3 186} 187 188declare i32 @printf(ptr, ...) #2 189 190attributes #0 = { nounwind } 191 192!llvm.ident = !{!0} 193 194!0 = !{!"Clang 3.1"} 195