xref: /llvm-project/llvm/test/CodeGen/Hexagon/tstbit.ll (revision 08a09822a5cb95940cfe11fc885840916c516dc4)
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc -mtriple=hexagon < %s | FileCheck %s
3
4; Function Attrs: nounwind readnone
5define i32 @f0(i32 %a0, i32 %a1) #0 {
6; CHECK-LABEL: f0:
7; CHECK:       // %bb.0: // %b0
8; CHECK-NEXT:    {
9; CHECK-NEXT:     p0 = tstbit(r0,r1)
10; CHECK-NEXT:    }
11; CHECK-NEXT:    {
12; CHECK-NEXT:     r0 = mux(p0,#1,#0)
13; CHECK-NEXT:     jumpr r31
14; CHECK-NEXT:    }
15b0:
16  %v0 = shl i32 1, %a1
17  %v1 = and i32 %v0, %a0
18  %v2 = icmp ne i32 %v1, 0
19  %v3 = zext i1 %v2 to i32
20  ret i32 %v3
21}
22
23define i64 @is_upper_bit_clear_i64(i64 %x) #0 {
24; CHECK-LABEL: is_upper_bit_clear_i64:
25; CHECK:       // %bb.0:
26; CHECK-NEXT:    {
27; CHECK-NEXT:     p0 = !tstbit(r1,#5)
28; CHECK-NEXT:     r1 = #0
29; CHECK-NEXT:    }
30; CHECK-NEXT:    {
31; CHECK-NEXT:     r0 = mux(p0,#1,#0)
32; CHECK-NEXT:     jumpr r31
33; CHECK-NEXT:    }
34  %sh = lshr i64 %x, 37
35  %m = and i64 %sh, 1
36  %r = xor i64 %m, 1
37  ret i64 %r
38}
39
40define i64 @is_lower_bit_clear_i64(i64 %x) #0 {
41; CHECK-LABEL: is_lower_bit_clear_i64:
42; CHECK:       // %bb.0:
43; CHECK-NEXT:    {
44; CHECK-NEXT:     p0 = !tstbit(r0,#27)
45; CHECK-NEXT:     r1 = #0
46; CHECK-NEXT:    }
47; CHECK-NEXT:    {
48; CHECK-NEXT:     r0 = mux(p0,#1,#0)
49; CHECK-NEXT:     jumpr r31
50; CHECK-NEXT:    }
51  %sh = lshr i64 %x, 27
52  %m = and i64 %sh, 1
53  %r = xor i64 %m, 1
54  ret i64 %r
55}
56
57define i32 @is_bit_clear_i32(i32 %x) #0 {
58; CHECK-LABEL: is_bit_clear_i32:
59; CHECK:       // %bb.0:
60; CHECK-NEXT:    {
61; CHECK-NEXT:     p0 = !tstbit(r0,#27)
62; CHECK-NEXT:    }
63; CHECK-NEXT:    {
64; CHECK-NEXT:     r0 = mux(p0,#1,#0)
65; CHECK-NEXT:     jumpr r31
66; CHECK-NEXT:    }
67  %sh = lshr i32 %x, 27
68  %n = xor i32 %sh, -1
69  %r = and i32 %n, 1
70  ret i32 %r
71}
72
73define i16 @is_bit_clear_i16(i16 %x) #0 {
74; CHECK-LABEL: is_bit_clear_i16:
75; CHECK:       // %bb.0:
76; CHECK-NEXT:    {
77; CHECK-NEXT:     p0 = !tstbit(r0,#7)
78; CHECK-NEXT:    }
79; CHECK-NEXT:    {
80; CHECK-NEXT:     r0 = mux(p0,#1,#0)
81; CHECK-NEXT:     jumpr r31
82; CHECK-NEXT:    }
83  %sh = lshr i16 %x, 7
84  %m = and i16 %sh, 1
85  %r = xor i16 %m, 1
86  ret i16 %r
87}
88
89define i8 @is_bit_clear_i8(i8 %x) #0 {
90; CHECK-LABEL: is_bit_clear_i8:
91; CHECK:       // %bb.0:
92; CHECK-NEXT:    {
93; CHECK-NEXT:     p0 = !tstbit(r0,#3)
94; CHECK-NEXT:    }
95; CHECK-NEXT:    {
96; CHECK-NEXT:     r0 = mux(p0,#1,#0)
97; CHECK-NEXT:     jumpr r31
98; CHECK-NEXT:    }
99  %sh = lshr i8 %x, 3
100  %m = and i8 %sh, 1
101  %r = xor i8 %m, 1
102  ret i8 %r
103}
104
105
106attributes #0 = { nounwind readnone }
107