1; RUN: llc -mtriple=hexagon -mcpu=hexagonv67t < %s | FileCheck %s 2 3; A simple test case for the tiny core instruction latency information. 4 5; CHECK-LABEL: test 6; CHECK-DAG: [[REG1:r([0-9]+)]] = memw([[REG0:r[0-9]+]]+#0) 7; CHECK-DAG: [[REG2:r([0-9]+)]] = memw([[REG0]]+#4) 8; CHECK-NEXT: } 9; CHECK: { 10; CHECK: { 11; CHECK-NEXT: = add([[REG2]],[[REG1]]) 12 13define i32 @test(ptr nocapture readonly %p) local_unnamed_addr #0 { 14entry: 15 %incdec.ptr = getelementptr inbounds i32, ptr %p, i32 1 16 %0 = load i32, ptr %p, align 4 17 %incdec.ptr1 = getelementptr inbounds i32, ptr %p, i32 2 18 %1 = load i32, ptr %incdec.ptr, align 4 19 %incdec.ptr2 = getelementptr inbounds i32, ptr %p, i32 3 20 %2 = load i32, ptr %incdec.ptr1, align 4 21 %3 = load i32, ptr %incdec.ptr2, align 4 22 %add = add nsw i32 %1, %0 23 %add4 = add nsw i32 %3, %2 24 %mul = mul nsw i32 %add4, %add 25 ret i32 %mul 26} 27 28; CHECK-LABEL: test1 29; CHECK-DAG: [[REG4:r([0-9]+)]] = memw([[REG3:r[0-9]+]]+#0) 30; CHECK-DAG: [[REG5:r([0-9]+)]] = memw([[REG3]]+#4) 31; CHECK-NEXT: } 32; CHECK: { 33; CHECK: { 34; CHECK-NEXT: [[REG7:r([0-9]+)]] = add([[REG5]],[[REG4]]) 35; CHECK: } 36; CHECK-NEXT: { 37; CHECK-NEXT: = sub([[REG7]] 38 39define i32 @test1(ptr nocapture readonly %p) local_unnamed_addr #0 { 40entry: 41 %incdec.ptr = getelementptr inbounds i32, ptr %p, i32 1 42 %0 = load i32, ptr %p, align 4 43 %incdec.ptr1 = getelementptr inbounds i32, ptr %p, i32 2 44 %1 = load i32, ptr %incdec.ptr, align 4 45 %incdec.ptr2 = getelementptr inbounds i32, ptr %p, i32 3 46 %2 = load i32, ptr %incdec.ptr1, align 4 47 %3 = load i32, ptr %incdec.ptr2, align 4 48 %add4.neg = add i32 %1, %0 49 %add = sub i32 %add4.neg, %2 50 %sub = sub i32 %add, %3 51 ret i32 %sub 52} 53 54; Test that multiplies are not placed in the same packet. 55; CHECK-LABEL: test2 56; CHECK: = mpyi 57; CHECK: } 58; CHECK: = mpyi 59; CHECK: } 60; CHECK: = mpyi 61; CHECK: } 62; CHECK: = mpyi 63 64define i32 @test2(ptr nocapture readonly %p) local_unnamed_addr #1 { 65entry: 66 %incdec.ptr = getelementptr inbounds i32, ptr %p, i32 1 67 %0 = load i32, ptr %p, align 4 68 %incdec.ptr1 = getelementptr inbounds i32, ptr %p, i32 2 69 %1 = load i32, ptr %incdec.ptr, align 4 70 %incdec.ptr2 = getelementptr inbounds i32, ptr %p, i32 3 71 %2 = load i32, ptr %incdec.ptr1, align 4 72 %3 = load i32, ptr %incdec.ptr2, align 4 73 %mul = mul nsw i32 %1, %0 74 %mul4 = mul nsw i32 %3, %2 75 %mul5 = mul nsw i32 %3, %0 76 %mul6 = mul nsw i32 %2, %1 77 %call = tail call i32 @foo(i32 %mul, i32 %mul4, i32 %mul5, i32 %mul6) #3 78 ret i32 %call 79} 80 81declare i32 @foo(i32, i32, i32, i32) local_unnamed_addr #2 82 83