xref: /llvm-project/llvm/test/CodeGen/Hexagon/swp-epilog-phi11.ll (revision a96f691985c8546e826012fdc3481c88f034a194)
1; RUN: llc -mtriple=hexagon-unknown-elf -mcpu=hexagonv55 -hexagon-initial-cfg-cleanup=0 < %s | FileCheck %s
2
3; Test that the pipeliner correctly generates the operands in the
4; epilog.
5
6; CHECK: loop0
7; CHECK: r{{[0-9]+}} = sfsub([[REG0:r([0-9]+)]],[[REG1:r([0-9]+)]])
8; CHECK: endloop0
9; CHECK: r{{[0-9]+}} = sfsub([[REG0]],[[REG1]])
10; CHECK: r{{[0-9]+}} = sfsub([[REG0]],r{{[0-9]+}})
11
12define dso_local void @test(i32 %m) local_unnamed_addr #0 {
13entry:
14  %div = sdiv i32 %m, 2
15  %sub = add nsw i32 %div, -1
16  br label %for.body.prol
17
18for.body.prol:
19  %i.0106.prol = phi i32 [ undef, %for.body.prol ], [ %sub, %entry ]
20  %sr.prol = phi float [ %0, %for.body.prol ], [ undef, %entry ]
21  %sr109.prol = phi float [ %sr.prol, %for.body.prol ], [ undef, %entry ]
22  %prol.iter = phi i32 [ %prol.iter.sub, %for.body.prol ], [ undef, %entry ]
23  %0 = load float, ptr undef, align 4
24  %sub7.prol = fsub contract float %sr109.prol, %0
25  store float %sub7.prol, ptr null, align 4
26  %prol.iter.sub = add i32 %prol.iter, -1
27  %prol.iter.cmp = icmp eq i32 %prol.iter.sub, 0
28  br i1 %prol.iter.cmp, label %for.body.prol.loopexit, label %for.body.prol
29
30for.body.prol.loopexit:
31  unreachable
32}
33
34