1; RUN: llc -mtriple=hexagon -enable-timing-class-latency=true < %s | FileCheck -check-prefix=CHECK-ONE %s 2; REQUIRES: asserts 3; Check there is no assert when enabling enable-timing-class-latency 4; CHECK-ONE: f0: 5 6; RUN: llc -mtriple=hexagon < %s | FileCheck -check-prefix=CHECK %s 7; CHECK: add(r{{[0-9]*}},sub(#1,r{{[0-9]*}}) 8; CHECK: call f1 9 10target triple = "hexagon" 11 12%s.0 = type { i16, i16, i16, ptr, i16, i16, i16, i16, i16, i16, i32, i32, i16, ptr, i16, ptr, i16, ptr, ptr, ptr, i16, ptr, ptr, i16, ptr, i16, ptr, ptr, %s.5, %s.4, %s.5, %s.5, i32, i32, i32, %s.6, i32, i32, i16, %s.7, %s.7 } 13%s.1 = type { i16, i16, i16, i16 } 14%s.2 = type { i16, i16 } 15%s.3 = type { i16, i16, i16, i16 } 16%s.4 = type { i32, i32, ptr } 17%s.5 = type { i32, i32, ptr } 18%s.6 = type { i16, i16, i16, i16 } 19%s.7 = type { i16, i16, i16, i16, i16, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr } 20 21; Function Attrs: nounwind 22define i32 @f0(ptr %a0) #0 { 23b0: 24 %v0 = alloca i16, align 2 25 %v1 = getelementptr inbounds %s.0, ptr %a0, i32 0, i32 12 26 %v2 = load i16, ptr %v1, align 2, !tbaa !0 27 %v3 = icmp sgt i16 %v2, 0 28 br i1 %v3, label %b1, label %b9 29 30b1: ; preds = %b0 31 %v4 = getelementptr inbounds %s.0, ptr %a0, i32 0, i32 17 32 %v5 = getelementptr inbounds %s.0, ptr %a0, i32 0, i32 29 33 br label %b2 34 35b2: ; preds = %b7, %b1 36 %v6 = phi i16 [ %v2, %b1 ], [ %v23, %b7 ] 37 %v7 = phi i32 [ 0, %b1 ], [ %v25, %b7 ] 38 %v8 = phi i16 [ 1, %b1 ], [ %v26, %b7 ] 39 %v9 = load ptr, ptr %v4, align 4, !tbaa !4 40 %v10 = getelementptr inbounds %s.3, ptr %v9, i32 %v7, i32 0 41 %v11 = load i16, ptr %v10, align 2, !tbaa !0 42 %v12 = getelementptr inbounds %s.3, ptr %v9, i32 %v7, i32 1 43 %v13 = load i16, ptr %v12, align 2, !tbaa !0 44 %v14 = icmp sgt i16 %v11, %v13 45 br i1 %v14, label %b6, label %b3 46 47b3: ; preds = %b2 48 %v15 = sext i16 %v11 to i32 49 %v16 = sext i16 %v13 to i32 50 %v17 = add i32 %v16, 1 51 br label %b4 52 53b4: ; preds = %b4, %b3 54 %v18 = phi i32 [ %v15, %b3 ], [ %v20, %b4 ] 55 %v19 = call i32 @f1(ptr %v5, i32 %v7, i32 undef, ptr %v0) #0 56 %v20 = add i32 %v18, 1 57 %v21 = icmp eq i32 %v20, %v17 58 br i1 %v21, label %b5, label %b4 59 60b5: ; preds = %b4 61 %v22 = load i16, ptr %v1, align 2, !tbaa !0 62 br label %b6 63 64b6: ; preds = %b5, %b2 65 %v23 = phi i16 [ %v22, %b5 ], [ %v6, %b2 ] 66 %v24 = icmp slt i16 %v8, %v23 67 br i1 %v24, label %b7, label %b8 68 69b7: ; preds = %b6 70 %v25 = sext i16 %v8 to i32 71 %v26 = add i16 %v8, 1 72 br label %b2 73 74b8: ; preds = %b6 75 br label %b9 76 77b9: ; preds = %b8, %b0 78 ret i32 0 79} 80 81declare i32 @f1(...) 82 83attributes #0 = { nounwind } 84 85!0 = !{!1, !1, i64 0} 86!1 = !{!"short", !2} 87!2 = !{!"omnipotent char", !3} 88!3 = !{!"Simple C/C++ TBAA"} 89!4 = !{!5, !5, i64 0} 90!5 = !{!"any pointer", !2} 91