xref: /llvm-project/llvm/test/CodeGen/Hexagon/struct_copy.ll (revision 2208c97c1bec2512d4e47b6223db6d95a7037956)
1; RUN: llc -mtriple=hexagon -hexagon-small-data-threshold=0 < %s | FileCheck %s
2; Disable small-data, or otherwise g3 will end up in .sdata. While that is
3; not a problem, this test was originally written with the g3 not being in
4; there, so keep it that way.
5
6%s.0 = type { i32, i32, i32, i32, i32, i32 }
7%s.1 = type { i64, i64, i64, i64, i64, i64 }
8%s.2 = type { i16, i16, i16, i16, i16, i16 }
9%s.3 = type { i8, i8, i8, i8, i8, i8 }
10
11@g0 = external global %s.0
12@g1 = external global %s.1
13@g2 = external global %s.2
14@g3 = external global %s.3
15
16; CHECK-LABEL: f0:
17; CHECK: [[REG1:(r[0-9]+)]] = {{[#]+}}g0
18; CHECK: r{{[0-9]+}} = memw([[REG1]]+#{{[0-9]+}})
19; CHECK-NOT: = memd
20; CHECK: dealloc_return
21define i32 @f0() #0 {
22b0:
23  %v0 = alloca %s.0, align 4
24  call void @llvm.memcpy.p0.p0.i32(ptr align 4 %v0, ptr align 4 @g0, i32 24, i1 false)
25  call void @f1(ptr %v0) #0
26  ret i32 0
27}
28
29declare void @f1(ptr)
30
31; CHECK-LABEL: f2:
32; CHECK: [[REG2:(r[0-9]+)]] = {{[#]+}}g1
33; CHECK: r{{[0-9]+}}:{{[0-9]+}} = memd([[REG2]]+#{{[0-9]+}})
34; CHECK: dealloc_return
35define i32 @f2() #0 {
36b0:
37  %v0 = alloca %s.1, align 8
38  call void @llvm.memcpy.p0.p0.i32(ptr align 8 %v0, ptr align 8 @g1, i32 48, i1 false)
39  call void @f3(ptr %v0) #0
40  ret i32 0
41}
42
43declare void @f3(ptr)
44
45; CHECK-LABEL: f4:
46; CHECK: [[REG1:(r[0-9]+)]] = {{[#]+}}g2
47; CHECK: r{{[0-9]+}} = mem{{u?}}h([[REG1]]+#{{[0-9]+}})
48; CHECK-NOT: = memd
49; CHECK: dealloc_return
50define i32 @f4() #0 {
51b0:
52  %v0 = alloca %s.2, align 2
53  call void @llvm.memcpy.p0.p0.i32(ptr align 2 %v0, ptr align 2 @g2, i32 12, i1 false)
54  call void @f5(ptr %v0) #0
55  ret i32 0
56}
57
58declare void @f5(ptr)
59
60; CHECK-LABEL: f6:
61; CHECK: [[REG1:(r[0-9]+)]] = {{[#]+}}g3
62; CHECK: r{{[0-9]+}} = mem{{u?}}b([[REG1]]+#{{[0-9]+}})
63; CHECK-NOT: = memw
64; CHECK: dealloc_return
65define i32 @f6() #0 {
66b0:
67  %v0 = alloca %s.3, align 1
68  call void @llvm.memcpy.p0.p0.i32(ptr align 1 %v0, ptr align 1 @g3, i32 6, i1 false)
69  call void @f7(ptr %v0) #0
70  ret i32 0
71}
72
73declare void @f7(ptr)
74
75declare void @llvm.memcpy.p0.p0.i32(ptr nocapture writeonly, ptr nocapture readonly, i32, i1) #1
76
77attributes #0 = { nounwind }
78attributes #1 = { argmemonly nounwind }
79