xref: /llvm-project/llvm/test/CodeGen/Hexagon/store-vector-pred.ll (revision 2208c97c1bec2512d4e47b6223db6d95a7037956) 
1; RUN: llc -mtriple=hexagon -hexagon-instsimplify=0 -hexagon-masked-vmem=0 < %s | FileCheck %s
2
3; This test checks that store a vector predicate of type v128i1 is lowered
4; without crashing.
5; CHECK: valign
6
7target triple = "hexagon"
8
9define dso_local void @f0() local_unnamed_addr #0 {
10b0:
11  br i1 undef, label %b2, label %b1
12
13b1:                                               ; preds = %b0
14  %v0 = load i8, ptr undef, align 1
15  %v1 = zext i8 %v0 to i32
16  %v2 = add nsw i32 %v1, -1
17  %v3 = insertelement <128 x i32> undef, i32 %v2, i32 0
18  %v4 = shufflevector <128 x i32> %v3, <128 x i32> undef, <128 x i32> zeroinitializer
19  %v5 = icmp ule <128 x i32> undef, %v4
20  %v6 = call <128 x i8> @llvm.masked.load.v128i8.p0(ptr nonnull undef, i32 1, <128 x i1> %v5, <128 x i8> undef)
21  %v7 = lshr <128 x i8> %v6, <i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4>
22  %v8 = and <128 x i8> %v7, <i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1>
23  %v9 = zext <128 x i8> %v8 to <128 x i32>
24  %v10 = add nsw <128 x i32> undef, %v9
25  %v11 = select <128 x i1> %v5, <128 x i32> %v10, <128 x i32> undef
26  %v12 = add <128 x i32> %v11, undef
27  %v13 = add <128 x i32> %v12, undef
28  %v14 = add <128 x i32> %v13, undef
29  %v15 = add <128 x i32> %v14, undef
30  %v16 = add <128 x i32> %v15, undef
31  %v17 = add <128 x i32> %v16, undef
32  %v18 = add <128 x i32> %v17, undef
33  %v19 = extractelement <128 x i32> %v18, i32 0
34  %v20 = getelementptr inbounds i8, ptr null, i32 2160
35  store i32 %v19, ptr %v20, align 4
36  br label %b2
37
38b2:                                               ; preds = %b1, %b0
39  ret void
40}
41
42; Function Attrs: argmemonly nounwind readonly willreturn
43declare <128 x i8> @llvm.masked.load.v128i8.p0(ptr, i32 immarg, <128 x i1>, <128 x i8>) #1
44
45attributes #0 = { "target-features"="+hvx-length128b,+hvxv67,+v67,-long-calls" }
46attributes #1 = { argmemonly nounwind readonly willreturn }
47