1; RUN: llc -mtriple=hexagon -hexagon-align-loads=0 < %s | FileCheck %s 2 3; CHECK-LABEL: aligned_load: 4; CHECK: = vmem({{.*}}) 5define <16 x i32> @aligned_load(ptr %p, <16 x i32> %a) #0 { 6 %v = load <16 x i32>, ptr %p, align 64 7 ret <16 x i32> %v 8} 9 10; CHECK-LABEL: aligned_store: 11; CHECK: vmem({{.*}}) = 12define void @aligned_store(ptr %p, <16 x i32> %a) #0 { 13 store <16 x i32> %a, ptr %p, align 64 14 ret void 15} 16 17; CHECK-LABEL: unaligned_load: 18; CHECK: = vmemu({{.*}}) 19define <16 x i32> @unaligned_load(ptr %p, <16 x i32> %a) #0 { 20 %v = load <16 x i32>, ptr %p, align 32 21 ret <16 x i32> %v 22} 23 24; CHECK-LABEL: unaligned_store: 25; CHECK: vmemu({{.*}}) = 26define void @unaligned_store(ptr %p, <16 x i32> %a) #0 { 27 store <16 x i32> %a, ptr %p, align 32 28 ret void 29} 30 31attributes #0 = { nounwind "target-cpu"="hexagonv60" "target-features"="+hvxv60,+hvx-length64b" } 32