xref: /llvm-project/llvm/test/CodeGen/Hexagon/prefetch-intr.ll (revision 2208c97c1bec2512d4e47b6223db6d95a7037956)
1; RUN: llc -mtriple=hexagon -O2 < %s | FileCheck %s
2; CHECK: dcfetch(
3
4target triple = "hexagon"
5
6; Function Attrs: nounwind
7define i32 @f0() #0 {
8b0:
9  %v0 = alloca i32, align 4
10  store i32 0, ptr %v0, align 4, !tbaa !0
11  call void @llvm.hexagon.prefetch(ptr %v0)
12  ret i32 0
13}
14
15; Function Attrs: nounwind
16declare void @llvm.hexagon.prefetch(ptr) #1
17
18attributes #0 = { nounwind "target-cpu"="hexagonv60" }
19attributes #1 = { nounwind }
20
21!0 = !{!1, !1, i64 0}
22!1 = !{!"int", !2, i64 0}
23!2 = !{!"omnipotent char", !3, i64 0}
24!3 = !{!"Simple C/C++ TBAA"}
25