xref: /llvm-project/llvm/test/CodeGen/Hexagon/packetize-l2fetch.ll (revision 2208c97c1bec2512d4e47b6223db6d95a7037956)
1; RUN: llc -mtriple=hexagon < %s | FileCheck %s
2
3; Check that this testcase compiles successfully.
4; Because l2fetch has mayLoad/mayStore flags on it, the packetizer
5; was tricked into thinking that it's a store. The v65-specific
6; code dealing with mem_shuff allowed it to be packetized together
7; with the load.
8
9; CHECK: l2fetch
10
11target triple = "hexagon"
12
13@g0 = external global [32768 x i8], align 8
14@g1 = external local_unnamed_addr global [15 x ptr], align 8
15
16; Function Attrs: nounwind
17define void @f0() local_unnamed_addr #0 {
18b0:
19  %ext = sext i8 ptrtoint (ptr getelementptr inbounds ([32768 x i8], ptr @g0, i32 0, i32 10000) to i8) to i32
20  %and = and i32 %ext, -65536
21  %ptr = inttoptr i32 %and to ptr
22  store ptr %ptr, ptr getelementptr inbounds ([15 x ptr], ptr @g1, i32 0, i32 1), align 4
23  store ptr %ptr, ptr getelementptr inbounds ([15 x ptr], ptr @g1, i32 0, i32 6), align 8
24  tail call void @f1()
25  %v0 = load ptr, ptr @g1, align 8
26  tail call void @llvm.hexagon.Y5.l2fetch(ptr %v0, i64 -9223372036854775808)
27  ret void
28}
29
30; Function Attrs: nounwind
31declare void @llvm.hexagon.Y5.l2fetch(ptr, i64) #1
32
33; Function Attrs: nounwind
34declare void @f1() #1
35
36attributes #0 = { nounwind "target-cpu"="hexagonv65" }
37attributes #1 = { nounwind }
38