1; RUN: llc -mtriple=hexagon < %s 2; Check that the mis-aligned load doesn't cause compiler to assert. 3 4@g0 = common global i32 0, align 4 5 6declare i32 @f0(i64) #0 7 8define i32 @f1() #0 { 9b0: 10 %v0 = alloca i32, align 4 11 %v1 = load i32, ptr @g0, align 4 12 store i32 %v1, ptr %v0, align 4 13 %v3 = load i64, ptr %v0, align 8 14 %v4 = call i32 @f0(i64 %v3) 15 ret i32 %v4 16} 17 18attributes #0 = { nounwind "target-cpu"="hexagonv5" } 19