xref: /llvm-project/llvm/test/CodeGen/Hexagon/memops2.ll (revision 2208c97c1bec2512d4e47b6223db6d95a7037956)
1; RUN: llc -mtriple=hexagon -mcpu=hexagonv5 < %s | FileCheck %s
2; Generate MemOps for V4 and above.
3
4
5define void @f(ptr nocapture %p) nounwind {
6entry:
7; CHECK:  memh(r{{[0-9]+}}+#20) -= #1
8  %add.ptr = getelementptr inbounds i16, ptr %p, i32 10
9  %0 = load i16, ptr %add.ptr, align 2
10  %conv2 = zext i16 %0 to i32
11  %sub = add nsw i32 %conv2, 65535
12  %conv1 = trunc i32 %sub to i16
13  store i16 %conv1, ptr %add.ptr, align 2
14  ret void
15}
16
17define void @g(ptr nocapture %p, i32 %i) nounwind {
18entry:
19; CHECK:  memh(r{{[0-9]+}}+#20) -= #1
20  %add.ptr.sum = add i32 %i, 10
21  %add.ptr1 = getelementptr inbounds i16, ptr %p, i32 %add.ptr.sum
22  %0 = load i16, ptr %add.ptr1, align 2
23  %conv3 = zext i16 %0 to i32
24  %sub = add nsw i32 %conv3, 65535
25  %conv2 = trunc i32 %sub to i16
26  store i16 %conv2, ptr %add.ptr1, align 2
27  ret void
28}
29