xref: /llvm-project/llvm/test/CodeGen/Hexagon/memcpy-memmove-inline.ll (revision 2208c97c1bec2512d4e47b6223db6d95a7037956)
1; RUN: llc -mtriple=hexagon -O2 -mno-pairing -mno-compound < %s | FileCheck %s
2
3; Test to see if we inline calls to memcpy/memmove when
4; the array size is small.
5
6target triple = "hexagon-unknown--elf"
7
8; CHECK-LABEL: f0:
9; CHECK-DAG: [[REG1:r[0-9]*]] = memw(r{{[0-9]*}}+#0)
10; CHECK-DAG: [[REG2:r[0-9]*]] = memuh(r{{[0-9]*}}+#4)
11; CHECK-DAG: [[REG3:r[0-9]*]] = memub(r{{[0-9]*}}+#6)
12; CHECK-DAG: memw(r{{[0-9]*}}+#0) = [[REG1]]
13; CHECK-DAG: memh(r{{[0-9]*}}+#4) = [[REG2]]
14; CHECK-DAG: memb(r{{[0-9]*}}+#6) = [[REG3]]
15
16define i32 @f0(ptr %a0) #0 {
17b0:
18  %v0 = alloca [10 x i32], align 8
19  call void @llvm.memcpy.p0.p0.i32(ptr align 4 %v0, ptr align 4 %a0, i32 7, i1 false)
20  call void @f1(ptr %v0, ptr %a0) #0
21  ret i32 0
22}
23
24declare void @f1(ptr, ptr)
25
26; CHECK-LABEL: f2:
27; CHECK-DAG: [[REG4:r[0-9]*]] = memub(r{{[0-9]*}}+#6)
28; CHECK-DAG: [[REG5:r[0-9]*]] = memuh(r{{[0-9]*}}+#4)
29; CHECK-DAG: [[REG6:r[0-9]*]] = memw(r{{[0-9]*}}+#0)
30; CHECK-DAG: memw(r{{[0-9]*}}+#0) = [[REG6]]
31; CHECK-DAG: memh(r{{[0-9]*}}+#4) = [[REG5]]
32; CHECK-DAG: memb(r{{[0-9]*}}+#6) = [[REG4]]
33
34define i32 @f2(ptr %a0, ptr %a1) #0 {
35b0:
36  call void @llvm.memmove.p0.p0.i32(ptr align 4 %a1, ptr align 4 %a0, i32 7, i1 false)
37  tail call void @f1(ptr %a1, ptr %a0) #0
38  ret i32 0
39}
40
41declare void @llvm.memcpy.p0.p0.i32(ptr nocapture writeonly, ptr nocapture readonly, i32, i1) #1
42declare void @llvm.memmove.p0.p0.i32(ptr nocapture, ptr nocapture readonly, i32, i1) #1
43
44attributes #0 = { nounwind }
45attributes #1 = { argmemonly nounwind }
46