xref: /llvm-project/llvm/test/CodeGen/Hexagon/loop-rotate-bug.ll (revision 2208c97c1bec2512d4e47b6223db6d95a7037956)
1; RUN: llc -mtriple=hexagon < %s | FileCheck %s
2
3; CHECK: cmp.eq
4; CHECK: cmp.eq
5; CHECK: cmp.eq
6; CHECK: cmp.eq
7
8%s.0 = type { ptr, i32, ptr }
9
10@g0 = external global ptr, align 4
11@g1 = private global [4 x i64] zeroinitializer, section "__llvm_prf_cnts", align 8
12
13declare void @f0(ptr)
14
15define i32 @f1() #0 {
16b0:
17  %v0 = load i64, ptr @g1, align 8
18  %v1 = add i64 %v0, 1
19  store i64 %v1, ptr @g1, align 8
20  br label %b1
21
22b1:                                               ; preds = %b6, %b0
23  %v2 = phi i32 [ 0, %b0 ], [ %v27, %b6 ]
24  %v3 = load i64, ptr getelementptr inbounds ([4 x i64], ptr @g1, i32 0, i32 1), align 8
25  %v4 = add i64 %v3, 1
26  store i64 %v4, ptr getelementptr inbounds ([4 x i64], ptr @g1, i32 0, i32 1), align 8
27  %v5 = load ptr, ptr @g0, align 4
28  %v6 = getelementptr inbounds ptr, ptr %v5, i32 %v2
29  %v7 = load ptr, ptr %v6, align 4
30  %v8 = icmp eq ptr %v7, null
31  br i1 %v8, label %b6, label %b2
32
33b2:                                               ; preds = %b1
34  %v9 = load i64, ptr getelementptr inbounds ([4 x i64], ptr @g1, i32 0, i32 2), align 8
35  %v10 = add i64 %v9, 1
36  store i64 %v10, ptr getelementptr inbounds ([4 x i64], ptr @g1, i32 0, i32 2), align 8
37  %v12 = getelementptr inbounds %s.0, ptr %v7, i32 0, i32 2
38  %v13 = load ptr, ptr %v12, align 4
39  %v14 = icmp eq ptr %v13, null
40  %v15 = getelementptr inbounds %s.0, ptr %v7, i32 0, i32 2
41  br i1 %v14, label %b5, label %b3
42
43b3:                                               ; preds = %b2
44  br label %b4
45
46b4:                                               ; preds = %b4, %b3
47  %v16 = phi ptr [ %v25, %b4 ], [ %v15, %b3 ]
48  %v17 = phi ptr [ %v20, %b4 ], [ %v7, %b3 ]
49  %v18 = load i64, ptr getelementptr inbounds ([4 x i64], ptr @g1, i32 0, i32 3), align 8
50  %v19 = add i64 %v18, 1
51  store i64 %v19, ptr getelementptr inbounds ([4 x i64], ptr @g1, i32 0, i32 3), align 8
52  %v20 = load ptr, ptr %v16, align 4
53  tail call void @f0(ptr %v17)
54  %v22 = getelementptr inbounds %s.0, ptr %v20, i32 0, i32 2
55  %v23 = load ptr, ptr %v22, align 4
56  %v24 = icmp eq ptr %v23, null
57  %v25 = getelementptr inbounds %s.0, ptr %v20, i32 0, i32 2
58  br i1 %v24, label %b5, label %b4
59
60b5:                                               ; preds = %b4, %b2
61  %v26 = phi ptr [ %v7, %b2 ], [ %v20, %b4 ]
62  tail call void @f0(ptr %v26)
63  br label %b6
64
65b6:                                               ; preds = %b5, %b1
66  %v27 = add nuw nsw i32 %v2, 1
67  %v28 = icmp eq i32 %v27, 3001
68  br i1 %v28, label %b7, label %b1
69
70b7:                                               ; preds = %b6
71  %v29 = load ptr, ptr @g0, align 4
72  tail call void @f0(ptr %v29)
73  ret i32 undef
74}
75
76attributes #0 = { nounwind "target-cpu"="hexagonv60" }
77
78