xref: /llvm-project/llvm/test/CodeGen/Hexagon/loop-prefetch.ll (revision 2208c97c1bec2512d4e47b6223db6d95a7037956)
1; RUN: llc -mtriple=hexagon -hexagon-loop-prefetch < %s | FileCheck %s
2; CHECK: dcfetch
3
4target triple = "hexagon"
5
6define void @copy(ptr nocapture %d, ptr nocapture readonly %s, i32 %n) local_unnamed_addr #0 {
7entry:
8  %tobool2 = icmp eq i32 %n, 0
9  br i1 %tobool2, label %while.end, label %while.body
10
11while.body:                                       ; preds = %entry, %while.body
12  %n.addr.05 = phi i32 [ %dec, %while.body ], [ %n, %entry ]
13  %s.addr.04 = phi ptr [ %incdec.ptr, %while.body ], [ %s, %entry ]
14  %d.addr.03 = phi ptr [ %incdec.ptr1, %while.body ], [ %d, %entry ]
15  %dec = add i32 %n.addr.05, -1
16  %incdec.ptr = getelementptr inbounds i32, ptr %s.addr.04, i32 1
17  %0 = load i32, ptr %s.addr.04, align 4
18  %incdec.ptr1 = getelementptr inbounds i32, ptr %d.addr.03, i32 1
19  store i32 %0, ptr %d.addr.03, align 4
20  %tobool = icmp eq i32 %dec, 0
21  br i1 %tobool, label %while.end, label %while.body
22
23while.end:                                        ; preds = %while.body, %entry
24  ret void
25}
26
27attributes #0 = { norecurse nounwind "target-cpu"="hexagonv60" "target-features"="-hvx" }
28