1; RUN: llc -mtriple=hexagon -O3 -hexagon-small-data-threshold=0 < %s | FileCheck %s 2; This test checks the case if there are more than 2 uses of a constan address, move the 3; value in to a register and replace all instances of constant with the register. 4; The GenMemAbsolute pass generates a absolute-set instruction if there are more 5; than 2 uses of this register. 6 7; CHECK: loadi32_3 8; CHECK-NOT: r{{[0-9]+}} = memw(##441652) 9; CHECK-NOT: r{{[0-9]+}} = memw(r{{[0-9]+}}+#0) 10; CHECK:r{{[0-9]+}} = memw(r[[REG:[0-9]+]]=##441652) 11; CHECK-NOT: r{{[0-9]+}} = {emw(##441652) 12; CHECK:r{{[0-9]+}} = memw(r[[REG]]+#0) 13; CHECK-NOT: r{{[0-9]+}} = memw(##441652) 14; CHECK:r{{[0-9]+}} = memw(r[[REG]]+#0) 15; CHECK-NOT: r{{[0-9]+}} = memw(##441652) 16 17define void @loadi32_3() #0 { 18entry: 19 %0 = load volatile i32, ptr inttoptr (i32 441652 to ptr), align 4 20 %1 = load volatile i32, ptr inttoptr (i32 441652 to ptr), align 4 21 %2 = load volatile i32, ptr inttoptr (i32 441652 to ptr), align 4 22 ret void 23} 24 25; CHECK: loadi32_2 26; CHECK-NOT: r{{[0-9]+}} = ##441652 27; CHECK: r{{[0-9]+}} = memw(##441652) 28; CHECK: r{{[0-9]+}} = memw(##441652) 29 30define void @loadi32_2() #0 { 31entry: 32 %0 = load volatile i32, ptr inttoptr (i32 441652 to ptr), align 4 33 %1 = load volatile i32, ptr inttoptr (i32 441652 to ptr), align 4 34 ret void 35} 36 37; CHECK: loadi32_abs_global_3 38; CHECK-NOT: r{{[0-9]+}} = memw(##globalInt) 39; CHECK-NOT: r{{[0-9]+}} = memw(r{{[0-9]+}}+#0) 40; CHECK:r{{[0-9]+}} = memw(r[[REG:[0-9]+]]=##globalInt) 41; CHECK-NOT: r{{[0-9]+}} = memw(##globalInt) 42; CHECK:r{{[0-9]+}} = memw(r[[REG]]+#0) 43; CHECK-NOT: r{{[0-9]+}} = memw(##globalInt) 44; CHECK:r{{[0-9]+}} = memw(r[[REG]]+#0) 45; CHECK-NOT: r{{[0-9]+}} = memw(##globalInt) 46 47@globalInt = external global i32, align 8 48define void @loadi32_abs_global_3() #0 { 49entry: 50 %0 = load volatile i32, ptr @globalInt, align 4 51 %1 = load volatile i32, ptr @globalInt, align 4 52 %2 = load volatile i32, ptr @globalInt, align 4 53 ret void 54} 55 56; CHECK: loadi32_abs_global_2 57; CHECK-NOT:r[[REG:[0-9]+]] = ##globalInt 58; CHECK:r{{[0-9]+}} = memw(##globalInt) 59; CHECK:r{{[0-9]+}} = memw(##globalInt) 60 61define void @loadi32_abs_global_2() #0 { 62entry: 63 %0 = load volatile i32, ptr @globalInt, align 4 64 %1 = load volatile i32, ptr @globalInt, align 4 65 ret void 66} 67 68attributes #0 = { nounwind } 69