xref: /llvm-project/llvm/test/CodeGen/Hexagon/isel/select-vec.ll (revision 2208c97c1bec2512d4e47b6223db6d95a7037956) 
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc -mtriple=hexagon -hexagon-expand-condsets=0 < %s | FileCheck %s
3
4define <4 x i8> @f0(<4 x i8> %a0, <4 x i8> %a1, i32 %a2) #0 {
5; CHECK-LABEL: f0:
6; CHECK:       // %bb.0:
7; CHECK-NEXT:    {
8; CHECK-NEXT:     p0 = cmp.eq(r2,#0)
9; CHECK-NEXT:    }
10; CHECK-NEXT:    {
11; CHECK-NEXT:     r0 = mux(p0,r0,r1)
12; CHECK-NEXT:     jumpr r31
13; CHECK-NEXT:    }
14  %v0 = icmp eq i32 %a2, 0
15  %v1 = select i1 %v0, <4 x i8> %a0, <4 x i8> %a1
16  ret <4 x i8> %v1
17}
18
19define <8 x i8> @f1(<8 x i8> %a0, <8 x i8> %a1, i32 %a2) #0 {
20; CHECK-LABEL: f1:
21; CHECK:       // %bb.0:
22; CHECK-NEXT:    {
23; CHECK-NEXT:     p0 = cmp.eq(r4,#0)
24; CHECK-NEXT:    }
25; CHECK-NEXT:    {
26; CHECK-NEXT:     r0 = mux(p0,r0,r2)
27; CHECK-NEXT:     jumpr r31
28; CHECK-NEXT:     r1 = mux(p0,r1,r3)
29; CHECK-NEXT:    }
30  %v0 = icmp eq i32 %a2, 0
31  %v1 = select i1 %v0, <8 x i8> %a0, <8 x i8> %a1
32  ret <8 x i8> %v1
33}
34
35define <2 x i16> @f2(<2 x i16> %a0, <2 x i16> %a1, i32 %a2) #0 {
36; CHECK-LABEL: f2:
37; CHECK:       // %bb.0:
38; CHECK-NEXT:    {
39; CHECK-NEXT:     p0 = cmp.eq(r2,#0)
40; CHECK-NEXT:    }
41; CHECK-NEXT:    {
42; CHECK-NEXT:     r0 = mux(p0,r0,r1)
43; CHECK-NEXT:     jumpr r31
44; CHECK-NEXT:    }
45  %v0 = icmp eq i32 %a2, 0
46  %v1 = select i1 %v0, <2 x i16> %a0, <2 x i16> %a1
47  ret <2 x i16> %v1
48}
49
50define <4 x i16> @f3(<4 x i16> %a0, <4 x i16> %a1, i32 %a2) #0 {
51; CHECK-LABEL: f3:
52; CHECK:       // %bb.0:
53; CHECK-NEXT:    {
54; CHECK-NEXT:     p0 = cmp.eq(r4,#0)
55; CHECK-NEXT:    }
56; CHECK-NEXT:    {
57; CHECK-NEXT:     r0 = mux(p0,r0,r2)
58; CHECK-NEXT:     jumpr r31
59; CHECK-NEXT:     r1 = mux(p0,r1,r3)
60; CHECK-NEXT:    }
61  %v0 = icmp eq i32 %a2, 0
62  %v1 = select i1 %v0, <4 x i16> %a0, <4 x i16> %a1
63  ret <4 x i16> %v1
64}
65
66define <2 x i32> @f4(<2 x i32> %a0, <2 x i32> %a1, i32 %a2) #0 {
67; CHECK-LABEL: f4:
68; CHECK:       // %bb.0:
69; CHECK-NEXT:    {
70; CHECK-NEXT:     p0 = cmp.eq(r4,#0)
71; CHECK-NEXT:    }
72; CHECK-NEXT:    {
73; CHECK-NEXT:     r0 = mux(p0,r0,r2)
74; CHECK-NEXT:     jumpr r31
75; CHECK-NEXT:     r1 = mux(p0,r1,r3)
76; CHECK-NEXT:    }
77  %v0 = icmp eq i32 %a2, 0
78  %v1 = select i1 %v0, <2 x i32> %a0, <2 x i32> %a1
79  ret <2 x i32> %v1
80}
81
82attributes #0 = { nounwind }
83