1; RUN: llc -O2 -mtriple=hexagon -hexagon-expand-condsets=0 < %s 2; REQUIRES: asserts 3; Disable expand-condsets because it will assert on undefined registers. 4 5target triple = "hexagon-unknown--elf" 6 7%s.0 = type { ptr, ptr } 8%s.1 = type { ptr, ptr } 9 10@g0 = external global %s.0, align 4 11 12; Function Attrs: nounwind 13define void @f0() #0 { 14b0: 15 br i1 undef, label %b2, label %b1 16 17b1: ; preds = %b0 18 unreachable 19 20b2: ; preds = %b0 21 br i1 undef, label %b26, label %b3 22 23b3: ; preds = %b2 24 br i1 undef, label %b6, label %b4 25 26b4: ; preds = %b3 27 br i1 undef, label %b5, label %b26 28 29b5: ; preds = %b4 30 br i1 undef, label %b7, label %b26 31 32b6: ; preds = %b3 33 br label %b7 34 35b7: ; preds = %b6, %b5 36 br i1 undef, label %b11, label %b8 37 38b8: ; preds = %b7 39 br i1 undef, label %b10, label %b9 40 41b9: ; preds = %b8 42 unreachable 43 44b10: ; preds = %b8 45 unreachable 46 47b11: ; preds = %b7 48 br i1 undef, label %b25, label %b12 49 50b12: ; preds = %b11 51 br i1 undef, label %b14, label %b13 52 53b13: ; preds = %b12 54 br label %b14 55 56b14: ; preds = %b13, %b12 57 br i1 undef, label %b15, label %b16 58 59b15: ; preds = %b14 60 br label %b16 61 62b16: ; preds = %b15, %b14 63 br i1 undef, label %b18, label %b17 64 65b17: ; preds = %b16 66 unreachable 67 68b18: ; preds = %b16 69 %v0 = load ptr, ptr getelementptr inbounds (%s.0, ptr @g0, i32 0, i32 1), align 4 70 %v1 = load ptr, ptr @g0, align 4 71 %v2 = select i1 undef, ptr %v0, ptr %v1 72 br i1 undef, label %b22, label %b19 73 74b19: ; preds = %b18 75 %v3 = load ptr, ptr undef, align 4 76 %v4 = icmp eq ptr %v3, null 77 br i1 %v4, label %b21, label %b20 78 79b20: ; preds = %b19 80 store ptr undef, ptr undef, align 4 81 br label %b21 82 83b21: ; preds = %b20, %b19 84 br label %b22 85 86b22: ; preds = %b21, %b18 87 br i1 undef, label %b24, label %b23 88 89b23: ; preds = %b22 90 store ptr %v2, ptr undef, align 4 91 br label %b24 92 93b24: ; preds = %b23, %b22 94 unreachable 95 96b25: ; preds = %b11 97 unreachable 98 99b26: ; preds = %b5, %b4, %b2 100 ret void 101} 102 103attributes #0 = { nounwind "target-cpu"="hexagonv55" } 104