xref: /llvm-project/llvm/test/CodeGen/Hexagon/hwloop-swap.ll (revision 2208c97c1bec2512d4e47b6223db6d95a7037956)
1; RUN: llc -mtriple=hexagon < %s | FileCheck %s
2
3; Test that the hardware loop pass does not alter the comparison
4; to use the result from the induction expression instead of
5; from the Phi.
6
7; CHECK: cmpb.gtu([[REG0:r[0-9]+]]
8; CHECK: [[REG0]] = add([[REG0]],
9
10define void @f0() #0 {
11b0:
12  br label %b1
13
14b1:                                               ; preds = %b1, %b0
15  br i1 undef, label %b1, label %b2
16
17b2:                                               ; preds = %b2, %b1
18  %v0 = phi i32 [ %v3, %b2 ], [ undef, %b1 ]
19  %v1 = trunc i32 %v0 to i8
20  %v2 = icmp ugt i8 %v1, 44
21  %v3 = add i32 %v0, -30
22  br i1 %v2, label %b2, label %b3
23
24b3:                                               ; preds = %b2
25  ret void
26}
27
28attributes #0 = { nounwind "target-cpu"="hexagonv55" }
29