1; RUN: opt -march=hexagon -hexagon-loop-idiom -S < %s | FileCheck %s 2; RUN: opt -mtriple=hexagon-- -p hexagon-loop-idiom -disable-memcpy-idiom -S < %s | FileCheck %s 3 4; Make sure we don't convert load/store loops into memcpy if the access type 5; is a vector. Using vector instructions is generally better in such cases. 6 7; CHECK-NOT: @llvm.memcpy 8 9%s.0 = type { i32 } 10 11define void @f0(ptr noalias %a0, ptr noalias %a1) #0 align 2 { 12b0: 13 br i1 undef, label %b1, label %b2 14 15b1: ; preds = %b1, %b0 16 %v0 = phi i32 [ %v7, %b1 ], [ 0, %b0 ] 17 %v1 = mul nuw nsw i32 %v0, 64 18 %v2 = getelementptr %s.0, ptr %a0, i32 %v1 19 %v3 = getelementptr %s.0, ptr %a1, i32 %v1 20 %v5 = load <64 x i32>, ptr %v2, align 256 21 store <64 x i32> %v5, ptr %v3, align 256 22 %v7 = add nuw nsw i32 %v0, 1 23 br i1 undef, label %b1, label %b2 24 25b2: ; preds = %b1, %b0 26 ret void 27} 28 29attributes #0 = { "target-cpu"="hexagonv60" "target-features"="+hvx,+hvx-length64b" } 30