xref: /llvm-project/llvm/test/CodeGen/Hexagon/fpelim-basic.ll (revision 2208c97c1bec2512d4e47b6223db6d95a7037956)
1; RUN: llc -mtriple=hexagon < %s | FileCheck %s
2
3target triple = "hexagon"
4
5; FP elimination enabled.
6;
7; CHECK-LABEL: danny:
8; CHECK: r29 = add(r29,#-[[SIZE:[0-9]+]])
9; CHECK: r29 = add(r29,#[[SIZE]])
10define i32 @danny(i32 %a0, i32 %a1) local_unnamed_addr #0 {
11b2:
12  %v3 = alloca [32 x i32], align 8
13  call void @llvm.lifetime.start.p0(i64 128, ptr nonnull %v3) #3
14  br label %b5
15
16b5:                                               ; preds = %b5, %b2
17  %v6 = phi i32 [ 0, %b2 ], [ %v8, %b5 ]
18  %v7 = getelementptr inbounds [32 x i32], ptr %v3, i32 0, i32 %v6
19  store i32 %v6, ptr %v7, align 4
20  %v8 = add nuw nsw i32 %v6, 1
21  %v9 = icmp eq i32 %v8, 32
22  br i1 %v9, label %b10, label %b5
23
24b10:                                              ; preds = %b5
25  %v11 = getelementptr inbounds [32 x i32], ptr %v3, i32 0, i32 %a0
26  store i32 %a1, ptr %v11, align 4
27  br label %b12
28
29b12:                                              ; preds = %b12, %b10
30  %v13 = phi i32 [ 0, %b10 ], [ %v18, %b12 ]
31  %v14 = phi i32 [ 0, %b10 ], [ %v17, %b12 ]
32  %v15 = getelementptr inbounds [32 x i32], ptr %v3, i32 0, i32 %v13
33  %v16 = load i32, ptr %v15, align 4
34  %v17 = add nsw i32 %v16, %v14
35  %v18 = add nuw nsw i32 %v13, 1
36  %v19 = icmp eq i32 %v18, 32
37  br i1 %v19, label %b20, label %b12
38
39b20:                                              ; preds = %b12
40  call void @llvm.lifetime.end.p0(i64 128, ptr nonnull %v3) #3
41  ret i32 %v17
42}
43
44; FP elimination disabled.
45;
46; CHECK-LABEL: sammy:
47; CHECK: allocframe
48; CHECK: dealloc_return
49define i32 @sammy(i32 %a0, i32 %a1) local_unnamed_addr #1 {
50b2:
51  %v3 = alloca [32 x i32], align 8
52  call void @llvm.lifetime.start.p0(i64 128, ptr nonnull %v3) #3
53  br label %b5
54
55b5:                                               ; preds = %b5, %b2
56  %v6 = phi i32 [ 0, %b2 ], [ %v8, %b5 ]
57  %v7 = getelementptr inbounds [32 x i32], ptr %v3, i32 0, i32 %v6
58  store i32 %v6, ptr %v7, align 4
59  %v8 = add nuw nsw i32 %v6, 1
60  %v9 = icmp eq i32 %v8, 32
61  br i1 %v9, label %b10, label %b5
62
63b10:                                              ; preds = %b5
64  %v11 = getelementptr inbounds [32 x i32], ptr %v3, i32 0, i32 %a0
65  store i32 %a1, ptr %v11, align 4
66  br label %b12
67
68b12:                                              ; preds = %b12, %b10
69  %v13 = phi i32 [ 0, %b10 ], [ %v18, %b12 ]
70  %v14 = phi i32 [ 0, %b10 ], [ %v17, %b12 ]
71  %v15 = getelementptr inbounds [32 x i32], ptr %v3, i32 0, i32 %v13
72  %v16 = load i32, ptr %v15, align 4
73  %v17 = add nsw i32 %v16, %v14
74  %v18 = add nuw nsw i32 %v13, 1
75  %v19 = icmp eq i32 %v18, 32
76  br i1 %v19, label %b20, label %b12
77
78b20:                                              ; preds = %b12
79  call void @llvm.lifetime.end.p0(i64 128, ptr nonnull %v3) #3
80  ret i32 %v17
81}
82
83declare void @llvm.lifetime.start.p0(i64, ptr nocapture) #2
84declare void @llvm.lifetime.end.p0(i64, ptr nocapture) #2
85
86attributes #0 = { nounwind readnone "frame-pointer"="none" "target-cpu"="hexagonv60" }
87attributes #1 = { nounwind readnone "frame-pointer"="all" "target-cpu"="hexagonv60" }
88attributes #2 = { argmemonly nounwind }
89attributes #3 = { nounwind }
90