1; RUN: llc -mtriple=hexagon < %s | FileCheck %s 2; All of these should be no-ops. Check this with -O0, to make sure 3; that no register copies are generated at any time. 4 5; CHECK-LABEL: f0: 6; CHECK-NOT: r{{[0-9]+}} = r{{[0-9]+}} 7; CHECK: jumpr r31 8define float @f0(i32 %a0) #0 { 9b0: 10 %v0 = bitcast i32 %a0 to float 11 ret float %v0 12} 13 14; CHECK-LABEL: f1: 15; CHECK-NOT: r{{[0-9]+}} = r{{[0-9]+}} 16; CHECK: jumpr r31 17define i32 @f1(float %a0) #0 { 18b0: 19 %v0 = bitcast float %a0 to i32 20 ret i32 %v0 21} 22 23; CHECK-LABEL: f2: 24; CHECK-NOT: r{{[0-9:]*}} = r{{[0-9:]*}} 25; CHECK: jumpr r31 26define double @f2(i64 %a0) #0 { 27b0: 28 %v0 = bitcast i64 %a0 to double 29 ret double %v0 30} 31 32; CHECK-LABEL: f3: 33; CHECK-NOT: r{{[0-9:]*}} = r{{[0-9:]*}} 34; CHECK: jumpr r31 35define i64 @f3(double %a0) #0 { 36b0: 37 %v0 = bitcast double %a0 to i64 38 ret i64 %v0 39} 40 41attributes #0 = { nounwind "target-cpu"="hexagonv55" } 42