xref: /llvm-project/llvm/test/CodeGen/Hexagon/feature-memops.ll (revision 2208c97c1bec2512d4e47b6223db6d95a7037956)
1; RUN: llc -mtriple=hexagon < %s | FileCheck %s
2
3; CHECK-LABEL: enabled:
4; CHECK: memw({{.*}}) += #1
5define void @enabled(ptr %p) #0 {
6  %v0 = load i32, ptr %p
7  %v1 = add i32 %v0, 1
8  store i32 %v1, ptr %p
9  ret void
10}
11
12; CHECK-LABEL: disabled:
13; CHECK-NOT: memw({{.*}}) += #1
14define void @disabled(ptr %p) #1 {
15  %v0 = load i32, ptr %p
16  %v1 = add i32 %v0, 1
17  store i32 %v1, ptr %p
18  ret void
19}
20
21attributes #0 = { nounwind }
22attributes #1 = { nounwind "target-features"="-memops" }
23
24