xref: /llvm-project/llvm/test/CodeGen/Hexagon/disable-const64.ll (revision 2208c97c1bec2512d4e47b6223db6d95a7037956)
1; RUN: llc -mtriple=hexagon -mcpu=hexagonv67t < %s | FileCheck %s
2
3target triple = "hexagon"
4
5; Disable CONST64 for tiny core since it is a memory operation and tiny core has
6; only one memory resource per packet.
7; CHECK: ##
8; CHECK: ##
9
10define void @analyze(ptr nocapture %in) local_unnamed_addr {
11entry:
12  %0 = tail call i64 @llvm.hexagon.M2.mmachs.s1(i64 10230955697128160, i64 10230955697128160, i64 0)
13  store i64 %0, ptr %in, align 8
14  ret void
15}
16
17; CHECK-NOT: CONST64
18define dso_local void @analyze2(ptr nocapture %in) local_unnamed_addr {
19entry:
20  %arrayidx = getelementptr inbounds i16, ptr %in, i32 3
21  %0 = load i16, ptr %arrayidx, align 2
22  %conv = sext i16 %0 to i64
23  %1 = tail call i64 @llvm.hexagon.M2.mmacls.s1(i64 undef, i64 30432282833584128, i64 %conv)
24  %arrayidx4 = getelementptr inbounds i16, ptr %in, i32 4
25  store i64 %1, ptr %arrayidx4, align 8
26  ret void
27}
28
29; Function Attrs: nounwind readnone
30declare i64 @llvm.hexagon.M2.mmachs.s1(i64, i64, i64)
31declare i64 @llvm.hexagon.M2.mmacls.s1(i64, i64, i64)
32