1; RUN: llc -mtriple=hexagon -mno-pairing -mno-compound <%s | FileCheck %s --check-prefix=CHECK-ONE 2; RUN: llc -mtriple=hexagon -mno-pairing -mno-compound <%s | FileCheck %s --check-prefix=CHECK-TWO 3; RUN: llc -mtriple=hexagon -mno-pairing -mno-compound <%s | FileCheck %s --check-prefix=CHECK-THREE 4 5%s.0 = type { i32, i8, i64 } 6%s.1 = type { i8, i64 } 7 8@g0 = external global ptr 9 10; CHECK-ONE: memw(r29+#48) = r2 11; CHECK-TWO: memw(r29+#52) = r2 12; CHECK-THREE: memw(r29+#56) = r2 13 14define void @f0(ptr noalias nocapture sret(%s.0) %a0, i32 %a1, i8 zeroext %a2, ptr byval(%s.0) nocapture readnone align 8 %a3, ptr byval(%s.1) nocapture readnone align 8 %a4) #0 { 15b0: 16 %v0 = alloca %s.0, align 8 17 %v1 = load ptr, ptr @g0, align 4 18 %v2 = sext i32 %a1 to i64 19 %v3 = add nsw i64 %v2, 1 20 %v4 = add nsw i32 %a1, 2 21 %v5 = add nsw i64 %v2, 3 22 call void @f1(ptr sret(%s.0) %v0, i32 45, ptr byval(%s.0) align 8 %v1, ptr byval(%s.0) align 8 %v1, i8 zeroext %a2, i64 %v3, i32 %v4, i64 %v5, i8 zeroext %a2, i8 zeroext %a2, i8 zeroext %a2, i32 45) 23 store i32 20, ptr %v0, align 8 24 call void @llvm.memcpy.p0.p0.i32(ptr align 8 %a0, ptr align 8 %v0, i32 16, i1 false) 25 ret void 26} 27 28declare void @f1(ptr sret(%s.0), i32, ptr byval(%s.0) align 8, ptr byval(%s.0) align 8, i8 zeroext, i64, i32, i64, i8 zeroext, i8 zeroext, i8 zeroext, i32) 29 30; Function Attrs: argmemonly nounwind 31declare void @llvm.memcpy.p0.p0.i32(ptr nocapture writeonly, ptr nocapture readonly, i32, i1) #1 32 33attributes #0 = { nounwind "target-cpu"="hexagonv55" } 34attributes #1 = { argmemonly nounwind } 35