xref: /llvm-project/llvm/test/CodeGen/Hexagon/adjust-latency-stackST.ll (revision 2208c97c1bec2512d4e47b6223db6d95a7037956)
1; RUN: llc -mtriple=hexagon < %s | FileCheck %s
2
3; Make sure that if there's only one store to the stack, it gets packetized
4; with allocframe as there's a latency of 2 cycles between allocframe and
5; the following store if not in the same packet.
6
7; CHECK: {
8; CHECK: memd(r29
9; CHECK-NOT: {
10; CHECK: allocframe
11; CHECK: }
12; CHECK: = memw(gp+#G)
13
14%struct.0 = type { ptr, i32, %struct.2 }
15%struct.1 = type { i32, i32, [31 x i8] }
16%struct.2 = type { %struct.1 }
17
18@G = common global ptr null, align 4
19
20define i32 @test(ptr nocapture %a0) #0 {
21b1:
22  %v2 = alloca ptr, align 4
23  %v5 = load ptr, ptr %a0, align 4
24  store ptr %v5, ptr %v2, align 4
25  %v7 = load ptr, ptr @G, align 4
26  tail call void @llvm.memcpy.p0.p0.i32(ptr align 4 %v5, ptr align 4 %v7, i32 48, i1 false)
27  %v8 = getelementptr inbounds %struct.0, ptr %a0, i32 0, i32 2, i32 0, i32 1
28  store i32 5, ptr %v8, align 4
29  %v9 = getelementptr inbounds %struct.0, ptr %v5, i32 0, i32 2, i32 0, i32 1
30  store i32 5, ptr %v9, align 4
31  %v11 = load i32, ptr %a0, align 4
32  store i32 %v11, ptr %v5, align 4
33  %v13 = call i32 @f0(ptr nonnull %v2)
34  %v14 = load ptr, ptr %v2, align 4
35  %v15 = getelementptr inbounds %struct.0, ptr %v14, i32 0, i32 1
36  %v16 = load i32, ptr %v15, align 4
37  %v17 = icmp eq i32 %v16, 0
38  br i1 %v17, label %b18, label %b32
39
40b18:                                              ; preds = %b1
41  %v20 = getelementptr inbounds %struct.0, ptr %v14, i32 0, i32 2, i32 0, i32 1
42  store i32 6, ptr %v20, align 4
43  %v21 = getelementptr inbounds %struct.0, ptr %a0, i32 0, i32 2, i32 0, i32 0
44  %v22 = load i32, ptr %v21, align 4
45  %v23 = getelementptr inbounds %struct.0, ptr %v14, i32 0, i32 2, i32 0, i32 0
46  %v24 = call i32 @f1(i32 %v22, ptr %v23)
47  %v25 = load ptr, ptr @G, align 4
48  %v26 = load i32, ptr %v25, align 4
49  %v27 = load ptr, ptr %v2, align 4
50  store i32 %v26, ptr %v27, align 4
51  %v28 = load ptr, ptr %v2, align 4
52  %v29 = getelementptr inbounds %struct.0, ptr %v28, i32 0, i32 2, i32 0, i32 1
53  %v30 = load i32, ptr %v29, align 4
54  %v31 = call i32 @f2(i32 %v30, i32 10, ptr %v29)
55  br label %b36
56
57b32:                                              ; preds = %b1
58  %v34 = load ptr, ptr %a0, align 4
59  call void @llvm.memcpy.p0.p0.i32(ptr align 4 %a0, ptr align 4 %v34, i32 48, i1 false)
60  br label %b36
61
62b36:                                              ; preds = %b32, %b18
63  ret i32 undef
64}
65
66declare void @llvm.memcpy.p0.p0.i32(ptr nocapture writeonly, ptr nocapture readonly, i32, i1) #1
67
68declare i32 @f0(...) #0
69declare i32 @f1(...) #0
70declare i32 @f2(...) #0
71
72attributes #0 = { nounwind }
73attributes #1 = { argmemonly nounwind }
74