xref: /llvm-project/llvm/test/CodeGen/CSKY/fpu/cvt-f.ll (revision 4ad517e6b0902ced1aeb179cabc9129a2007eca4)
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2
3; RUN: llc -verify-machineinstrs -csky-no-aliases < %s -mtriple=csky -float-abi=hard -mattr=+hard-float -mattr=+2e3 -mattr=+fpuv2_sf | FileCheck %s --check-prefix=CHECK-SF
4; RUN: llc -verify-machineinstrs -csky-no-aliases < %s -mtriple=csky -float-abi=hard -mattr=+hard-float -mattr=+2e3 -mattr=+fpuv3_sf | FileCheck %s --check-prefix=CHECK-SF2
5
6
7; float --> i32
8define i32 @fptosiR_float_1(float %x) {
9;
10; CHECK-SF-LABEL: fptosiR_float_1:
11; CHECK-SF:       # %bb.0: # %entry
12; CHECK-SF-NEXT:    fstosi.rz vr0, vr0
13; CHECK-SF-NEXT:    fmfvrl a0, vr0
14; CHECK-SF-NEXT:    rts16
15;
16; CHECK-SF2-LABEL: fptosiR_float_1:
17; CHECK-SF2:       # %bb.0: # %entry
18; CHECK-SF2-NEXT:    fftoi.f32.s32.rz vr0, vr0
19; CHECK-SF2-NEXT:    fmfvr.32.1 a0, vr0
20; CHECK-SF2-NEXT:    rts16
21entry:
22  %fptosi = fptosi float %x to i32
23  ret i32 %fptosi
24}
25
26
27; float --> i16
28define i16 @fptosiR_float_2(float %x) {
29;
30; CHECK-SF-LABEL: fptosiR_float_2:
31; CHECK-SF:       # %bb.0: # %entry
32; CHECK-SF-NEXT:    fstosi.rz vr0, vr0
33; CHECK-SF-NEXT:    fmfvrl a0, vr0
34; CHECK-SF-NEXT:    rts16
35;
36; CHECK-SF2-LABEL: fptosiR_float_2:
37; CHECK-SF2:       # %bb.0: # %entry
38; CHECK-SF2-NEXT:    fftoi.f32.s32.rz vr0, vr0
39; CHECK-SF2-NEXT:    fmfvr.32.1 a0, vr0
40; CHECK-SF2-NEXT:    rts16
41entry:
42  %fptosi = fptosi float %x to i16
43  ret i16 %fptosi
44}
45
46
47; float --> i8
48define i8 @fptosiR_float_3(float %x) {
49;
50; CHECK-SF-LABEL: fptosiR_float_3:
51; CHECK-SF:       # %bb.0: # %entry
52; CHECK-SF-NEXT:    fstosi.rz vr0, vr0
53; CHECK-SF-NEXT:    fmfvrl a0, vr0
54; CHECK-SF-NEXT:    rts16
55;
56; CHECK-SF2-LABEL: fptosiR_float_3:
57; CHECK-SF2:       # %bb.0: # %entry
58; CHECK-SF2-NEXT:    fftoi.f32.s32.rz vr0, vr0
59; CHECK-SF2-NEXT:    fmfvr.32.1 a0, vr0
60; CHECK-SF2-NEXT:    rts16
61entry:
62  %fptosi = fptosi float %x to i8
63  ret i8 %fptosi
64}
65
66
67; float --> i1
68define i1 @fptosiR_float_4(float %x) {
69;
70; CHECK-SF-LABEL: fptosiR_float_4:
71; CHECK-SF:       # %bb.0: # %entry
72; CHECK-SF-NEXT:    fstosi.rz vr0, vr0
73; CHECK-SF-NEXT:    fmfvrl a0, vr0
74; CHECK-SF-NEXT:    rts16
75;
76; CHECK-SF2-LABEL: fptosiR_float_4:
77; CHECK-SF2:       # %bb.0: # %entry
78; CHECK-SF2-NEXT:    fftoi.f32.s32.rz vr0, vr0
79; CHECK-SF2-NEXT:    fmfvr.32.1 a0, vr0
80; CHECK-SF2-NEXT:    rts16
81entry:
82  %fptosi = fptosi float %x to i1
83  ret i1 %fptosi
84}
85
86
87
88
89; float --> i32
90define i32 @fptouiR_float_1(float %x) {
91;
92; CHECK-SF-LABEL: fptouiR_float_1:
93; CHECK-SF:       # %bb.0: # %entry
94; CHECK-SF-NEXT:    fstoui.rz vr0, vr0
95; CHECK-SF-NEXT:    fmfvrl a0, vr0
96; CHECK-SF-NEXT:    rts16
97;
98; CHECK-SF2-LABEL: fptouiR_float_1:
99; CHECK-SF2:       # %bb.0: # %entry
100; CHECK-SF2-NEXT:    fftoi.f32.u32.rz vr0, vr0
101; CHECK-SF2-NEXT:    fmfvr.32.1 a0, vr0
102; CHECK-SF2-NEXT:    rts16
103
104
105entry:
106  %fptoui = fptoui float %x to i32
107  ret i32 %fptoui
108}
109
110
111
112; float --> i16
113define i16 @fptouiR_float_2(float %x) {
114;
115; CHECK-SF-LABEL: fptouiR_float_2:
116; CHECK-SF:       # %bb.0: # %entry
117; CHECK-SF-NEXT:    fstoui.rz vr0, vr0
118; CHECK-SF-NEXT:    fmfvrl a0, vr0
119; CHECK-SF-NEXT:    rts16
120;
121; CHECK-SF2-LABEL: fptouiR_float_2:
122; CHECK-SF2:       # %bb.0: # %entry
123; CHECK-SF2-NEXT:    fftoi.f32.u32.rz vr0, vr0
124; CHECK-SF2-NEXT:    fmfvr.32.1 a0, vr0
125; CHECK-SF2-NEXT:    rts16
126
127
128entry:
129  %fptoui = fptoui float %x to i16
130  ret i16 %fptoui
131}
132
133
134
135; float --> i8
136define i8 @fptouiR_float_3(float %x) {
137;
138; CHECK-SF-LABEL: fptouiR_float_3:
139; CHECK-SF:       # %bb.0: # %entry
140; CHECK-SF-NEXT:    fstoui.rz vr0, vr0
141; CHECK-SF-NEXT:    fmfvrl a0, vr0
142; CHECK-SF-NEXT:    rts16
143;
144; CHECK-SF2-LABEL: fptouiR_float_3:
145; CHECK-SF2:       # %bb.0: # %entry
146; CHECK-SF2-NEXT:    fftoi.f32.u32.rz vr0, vr0
147; CHECK-SF2-NEXT:    fmfvr.32.1 a0, vr0
148; CHECK-SF2-NEXT:    rts16
149
150
151entry:
152  %fptoui = fptoui float %x to i8
153  ret i8 %fptoui
154}
155
156
157; float --> i1
158define i1 @fptouiR_float_4(float %x) {
159;
160; CHECK-SF-LABEL: fptouiR_float_4:
161; CHECK-SF:       # %bb.0: # %entry
162; CHECK-SF-NEXT:    fstoui.rz vr0, vr0
163; CHECK-SF-NEXT:    fmfvrl a0, vr0
164; CHECK-SF-NEXT:    rts16
165;
166; CHECK-SF2-LABEL: fptouiR_float_4:
167; CHECK-SF2:       # %bb.0: # %entry
168; CHECK-SF2-NEXT:    fftoi.f32.u32.rz vr0, vr0
169; CHECK-SF2-NEXT:    fmfvr.32.1 a0, vr0
170; CHECK-SF2-NEXT:    rts16
171entry:
172  %fptoui = fptoui float %x to i1
173  ret i1 %fptoui
174}
175
176; i32/i16/i8/i1 --> float
177
178define float @sitofpR_float_0(i32 %x) {
179;
180; CHECK-SF-LABEL: sitofpR_float_0:
181; CHECK-SF:       # %bb.0: # %entry
182; CHECK-SF-NEXT:    fmtvrl vr0, a0
183; CHECK-SF-NEXT:    fsitos vr0, vr0
184; CHECK-SF-NEXT:    rts16
185;
186; CHECK-SF2-LABEL: sitofpR_float_0:
187; CHECK-SF2:       # %bb.0: # %entry
188; CHECK-SF2-NEXT:    fmtvr.32.1 vr0, a0
189; CHECK-SF2-NEXT:    fitof.s32.f32 vr0, vr0
190; CHECK-SF2-NEXT:    rts16
191entry:
192  %sitofp = sitofp i32 %x to float
193  ret float %sitofp
194}
195
196define float @sitofpR_float_1(i16 %x) {
197;
198; CHECK-SF-LABEL: sitofpR_float_1:
199; CHECK-SF:       # %bb.0: # %entry
200; CHECK-SF-NEXT:    sexth16 a0, a0
201; CHECK-SF-NEXT:    fmtvrl vr0, a0
202; CHECK-SF-NEXT:    fsitos vr0, vr0
203; CHECK-SF-NEXT:    rts16
204;
205; CHECK-SF2-LABEL: sitofpR_float_1:
206; CHECK-SF2:       # %bb.0: # %entry
207; CHECK-SF2-NEXT:    sexth16 a0, a0
208; CHECK-SF2-NEXT:    fmtvr.32.1 vr0, a0
209; CHECK-SF2-NEXT:    fitof.s32.f32 vr0, vr0
210; CHECK-SF2-NEXT:    rts16
211entry:
212  %sitofp = sitofp i16 %x to float
213  ret float %sitofp
214}
215
216define float @sitofpR_float_2(i8 %x) {
217;
218; CHECK-SF-LABEL: sitofpR_float_2:
219; CHECK-SF:       # %bb.0: # %entry
220; CHECK-SF-NEXT:    sextb16 a0, a0
221; CHECK-SF-NEXT:    fmtvrl vr0, a0
222; CHECK-SF-NEXT:    fsitos vr0, vr0
223; CHECK-SF-NEXT:    rts16
224;
225; CHECK-SF2-LABEL: sitofpR_float_2:
226; CHECK-SF2:       # %bb.0: # %entry
227; CHECK-SF2-NEXT:    sextb16 a0, a0
228; CHECK-SF2-NEXT:    fmtvr.32.1 vr0, a0
229; CHECK-SF2-NEXT:    fitof.s32.f32 vr0, vr0
230; CHECK-SF2-NEXT:    rts16
231entry:
232  %sitofp = sitofp i8 %x to float
233  ret float %sitofp
234}
235
236define float @sitofpR_float_3(i1 %x) {
237;
238; CHECK-SF-LABEL: sitofpR_float_3:
239; CHECK-SF:       # %bb.0: # %entry
240; CHECK-SF-NEXT:    sext32 a0, a0, 0, 0
241; CHECK-SF-NEXT:    fmtvrl vr0, a0
242; CHECK-SF-NEXT:    fsitos vr0, vr0
243; CHECK-SF-NEXT:    rts16
244;
245; CHECK-SF2-LABEL: sitofpR_float_3:
246; CHECK-SF2:       # %bb.0: # %entry
247; CHECK-SF2-NEXT:    sext32 a0, a0, 0, 0
248; CHECK-SF2-NEXT:    fmtvr.32.1 vr0, a0
249; CHECK-SF2-NEXT:    fitof.s32.f32 vr0, vr0
250; CHECK-SF2-NEXT:    rts16
251entry:
252  %sitofp = sitofp i1 %x to float
253  ret float %sitofp
254}
255
256; i32/i16/i8/i1 --> float
257
258define float @uitofpR_float_0(i32 %x) {
259;
260; CHECK-SF-LABEL: uitofpR_float_0:
261; CHECK-SF:       # %bb.0: # %entry
262; CHECK-SF-NEXT:    fmtvrl vr0, a0
263; CHECK-SF-NEXT:    fuitos vr0, vr0
264; CHECK-SF-NEXT:    rts16
265;
266; CHECK-SF2-LABEL: uitofpR_float_0:
267; CHECK-SF2:       # %bb.0: # %entry
268; CHECK-SF2-NEXT:    fmtvr.32.1 vr0, a0
269; CHECK-SF2-NEXT:    fitof.u32.f32 vr0, vr0
270; CHECK-SF2-NEXT:    rts16
271entry:
272  %uitofp = uitofp i32 %x to float
273  ret float %uitofp
274}
275
276define float @uitofpR_float_1(i16 %x) {
277;
278; CHECK-SF-LABEL: uitofpR_float_1:
279; CHECK-SF:       # %bb.0: # %entry
280; CHECK-SF-NEXT:    zexth16 a0, a0
281; CHECK-SF-NEXT:    fmtvrl vr0, a0
282; CHECK-SF-NEXT:    fuitos vr0, vr0
283; CHECK-SF-NEXT:    rts16
284;
285; CHECK-SF2-LABEL: uitofpR_float_1:
286; CHECK-SF2:       # %bb.0: # %entry
287; CHECK-SF2-NEXT:    zexth16 a0, a0
288; CHECK-SF2-NEXT:    fmtvr.32.1 vr0, a0
289; CHECK-SF2-NEXT:    fitof.u32.f32 vr0, vr0
290; CHECK-SF2-NEXT:    rts16
291entry:
292  %uitofp = uitofp i16 %x to float
293  ret float %uitofp
294}
295
296define float @uitofpR_float_2(i8 %x) {
297;
298; CHECK-SF-LABEL: uitofpR_float_2:
299; CHECK-SF:       # %bb.0: # %entry
300; CHECK-SF-NEXT:    zextb16 a0, a0
301; CHECK-SF-NEXT:    fmtvrl vr0, a0
302; CHECK-SF-NEXT:    fuitos vr0, vr0
303; CHECK-SF-NEXT:    rts16
304;
305; CHECK-SF2-LABEL: uitofpR_float_2:
306; CHECK-SF2:       # %bb.0: # %entry
307; CHECK-SF2-NEXT:    zextb16 a0, a0
308; CHECK-SF2-NEXT:    fmtvr.32.1 vr0, a0
309; CHECK-SF2-NEXT:    fitof.u32.f32 vr0, vr0
310; CHECK-SF2-NEXT:    rts16
311entry:
312  %uitofp = uitofp i8 %x to float
313  ret float %uitofp
314}
315
316define float @uitofpR_float_3(i1 %x) {
317;
318; CHECK-SF-LABEL: uitofpR_float_3:
319; CHECK-SF:       # %bb.0: # %entry
320; CHECK-SF-NEXT:    andi32 a0, a0, 1
321; CHECK-SF-NEXT:    fmtvrl vr0, a0
322; CHECK-SF-NEXT:    fuitos vr0, vr0
323; CHECK-SF-NEXT:    rts16
324;
325; CHECK-SF2-LABEL: uitofpR_float_3:
326; CHECK-SF2:       # %bb.0: # %entry
327; CHECK-SF2-NEXT:    andi32 a0, a0, 1
328; CHECK-SF2-NEXT:    fmtvr.32.1 vr0, a0
329; CHECK-SF2-NEXT:    fitof.u32.f32 vr0, vr0
330; CHECK-SF2-NEXT:    rts16
331entry:
332  %uitofp = uitofp i1 %x to float
333  ret float %uitofp
334}
335