xref: /llvm-project/llvm/test/CodeGen/CSKY/fpu/cvt-d.ll (revision 4ad517e6b0902ced1aeb179cabc9129a2007eca4)
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2
3; RUN: llc -verify-machineinstrs -csky-no-aliases < %s -mtriple=csky -float-abi=hard -mattr=+hard-float -mattr=+2e3 -mattr=+fpuv2_sf -mattr=+fpuv2_df | FileCheck %s --check-prefix=CHECK-DF
4; RUN: llc -verify-machineinstrs -csky-no-aliases < %s -mtriple=csky -float-abi=hard -mattr=+hard-float -mattr=+2e3 -mattr=+fpuv3_sf -mattr=+fpuv3_df | FileCheck %s --check-prefix=CHECK-DF2
5
6
7; double --> float
8define float @fptruncR_double_0(double %x) {
9;
10; CHECK-DF-LABEL: fptruncR_double_0:
11; CHECK-DF:       # %bb.0: # %entry
12; CHECK-DF-NEXT:    fdtos vr0, vr0
13; CHECK-DF-NEXT:    rts16
14;
15; CHECK-DF2-LABEL: fptruncR_double_0:
16; CHECK-DF2:       # %bb.0: # %entry
17; CHECK-DF2-NEXT:    fdtos vr0, vr0
18; CHECK-DF2-NEXT:    rts16
19entry:
20  %fptrunc = fptrunc double %x to float
21  ret float %fptrunc
22}
23
24define double @fpextR_double_0(float %x) {
25;
26; CHECK-DF-LABEL: fpextR_double_0:
27; CHECK-DF:       # %bb.0: # %entry
28; CHECK-DF-NEXT:    fstod vr0, vr0
29; CHECK-DF-NEXT:    rts16
30;
31; CHECK-DF2-LABEL: fpextR_double_0:
32; CHECK-DF2:       # %bb.0: # %entry
33; CHECK-DF2-NEXT:    fstod vr0, vr0
34; CHECK-DF2-NEXT:    rts16
35entry:
36  %fpext = fpext float %x to double
37  ret double %fpext
38}
39
40; double --> i32
41define i32 @fptosiR_double_1(double %x) {
42;
43;
44; CHECK-DF-LABEL: fptosiR_double_1:
45; CHECK-DF:       # %bb.0: # %entry
46; CHECK-DF-NEXT:    fdtosi.rz vr0, vr0
47; CHECK-DF-NEXT:    fmfvrl a0, vr0
48; CHECK-DF-NEXT:    rts16
49;
50; CHECK-DF2-LABEL: fptosiR_double_1:
51; CHECK-DF2:       # %bb.0: # %entry
52; CHECK-DF2-NEXT:    fftoi.f64.s32.rz vr0, vr0
53; CHECK-DF2-NEXT:    fmfvr.32.1 a0, vr0
54; CHECK-DF2-NEXT:    rts16
55entry:
56  %fptosi = fptosi double %x to i32
57  ret i32 %fptosi
58}
59
60
61; double --> i16
62define i16 @fptosiR_double_2(double %x) {
63;
64;
65; CHECK-DF-LABEL: fptosiR_double_2:
66; CHECK-DF:       # %bb.0: # %entry
67; CHECK-DF-NEXT:    fdtosi.rz vr0, vr0
68; CHECK-DF-NEXT:    fmfvrl a0, vr0
69; CHECK-DF-NEXT:    rts16
70;
71; CHECK-DF2-LABEL: fptosiR_double_2:
72; CHECK-DF2:       # %bb.0: # %entry
73; CHECK-DF2-NEXT:    fftoi.f64.s32.rz vr0, vr0
74; CHECK-DF2-NEXT:    fmfvr.32.1 a0, vr0
75; CHECK-DF2-NEXT:    rts16
76entry:
77  %fptosi = fptosi double %x to i16
78  ret i16 %fptosi
79}
80
81
82; double --> i8
83define i8 @fptosiR_double_3(double %x) {
84;
85;
86; CHECK-DF-LABEL: fptosiR_double_3:
87; CHECK-DF:       # %bb.0: # %entry
88; CHECK-DF-NEXT:    fdtosi.rz vr0, vr0
89; CHECK-DF-NEXT:    fmfvrl a0, vr0
90; CHECK-DF-NEXT:    rts16
91;
92; CHECK-DF2-LABEL: fptosiR_double_3:
93; CHECK-DF2:       # %bb.0: # %entry
94; CHECK-DF2-NEXT:    fftoi.f64.s32.rz vr0, vr0
95; CHECK-DF2-NEXT:    fmfvr.32.1 a0, vr0
96; CHECK-DF2-NEXT:    rts16
97entry:
98  %fptosi = fptosi double %x to i8
99  ret i8 %fptosi
100}
101
102; double --> i1
103define i1 @fptosiR_double_4(double %x) {
104;
105;
106; CHECK-DF-LABEL: fptosiR_double_4:
107; CHECK-DF:       # %bb.0: # %entry
108; CHECK-DF-NEXT:    fdtosi.rz vr0, vr0
109; CHECK-DF-NEXT:    fmfvrl a0, vr0
110; CHECK-DF-NEXT:    rts16
111;
112; CHECK-DF2-LABEL: fptosiR_double_4:
113; CHECK-DF2:       # %bb.0: # %entry
114; CHECK-DF2-NEXT:    fftoi.f64.s32.rz vr0, vr0
115; CHECK-DF2-NEXT:    fmfvr.32.1 a0, vr0
116; CHECK-DF2-NEXT:    rts16
117entry:
118  %fptosi = fptosi double %x to i1
119  ret i1 %fptosi
120}
121
122; double --> i32
123define i32 @fptouiR_double_1(double %x) {
124;
125; CHECK-DF-LABEL: fptouiR_double_1:
126; CHECK-DF:       # %bb.0: # %entry
127; CHECK-DF-NEXT:    fdtoui.rz vr0, vr0
128; CHECK-DF-NEXT:    fmfvrl a0, vr0
129; CHECK-DF-NEXT:    rts16
130;
131; CHECK-DF2-LABEL: fptouiR_double_1:
132; CHECK-DF2:       # %bb.0: # %entry
133; CHECK-DF2-NEXT:    fftoi.f64.u32.rz vr0, vr0
134; CHECK-DF2-NEXT:    fmfvr.32.1 a0, vr0
135; CHECK-DF2-NEXT:    rts16
136
137entry:
138  %fptoui = fptoui double %x to i32
139  ret i32 %fptoui
140}
141
142
143; double --> i16
144define i16 @fptouiR_double_2(double %x) {
145;
146; CHECK-DF-LABEL: fptouiR_double_2:
147; CHECK-DF:       # %bb.0: # %entry
148; CHECK-DF-NEXT:    fdtoui.rz vr0, vr0
149; CHECK-DF-NEXT:    fmfvrl a0, vr0
150; CHECK-DF-NEXT:    rts16
151;
152; CHECK-DF2-LABEL: fptouiR_double_2:
153; CHECK-DF2:       # %bb.0: # %entry
154; CHECK-DF2-NEXT:    fftoi.f64.u32.rz vr0, vr0
155; CHECK-DF2-NEXT:    fmfvr.32.1 a0, vr0
156; CHECK-DF2-NEXT:    rts16
157
158entry:
159  %fptoui = fptoui double %x to i16
160  ret i16 %fptoui
161}
162
163
164; double --> i8
165define i8 @fptouiR_double_3(double %x) {
166;
167; CHECK-DF-LABEL: fptouiR_double_3:
168; CHECK-DF:       # %bb.0: # %entry
169; CHECK-DF-NEXT:    fdtoui.rz vr0, vr0
170; CHECK-DF-NEXT:    fmfvrl a0, vr0
171; CHECK-DF-NEXT:    rts16
172;
173; CHECK-DF2-LABEL: fptouiR_double_3:
174; CHECK-DF2:       # %bb.0: # %entry
175; CHECK-DF2-NEXT:    fftoi.f64.u32.rz vr0, vr0
176; CHECK-DF2-NEXT:    fmfvr.32.1 a0, vr0
177; CHECK-DF2-NEXT:    rts16
178entry:
179  %fptoui = fptoui double %x to i8
180  ret i8 %fptoui
181}
182
183
184; double --> i1
185define i1 @fptouiR_double_4(double %x) {
186;
187;
188; CHECK-DF-LABEL: fptouiR_double_4:
189; CHECK-DF:       # %bb.0: # %entry
190; CHECK-DF-NEXT:    fdtoui.rz vr0, vr0
191; CHECK-DF-NEXT:    fmfvrl a0, vr0
192; CHECK-DF-NEXT:    rts16
193;
194; CHECK-DF2-LABEL: fptouiR_double_4:
195; CHECK-DF2:       # %bb.0: # %entry
196; CHECK-DF2-NEXT:    fftoi.f64.u32.rz vr0, vr0
197; CHECK-DF2-NEXT:    fmfvr.32.1 a0, vr0
198; CHECK-DF2-NEXT:    rts16
199entry:
200  %fptoui = fptoui double %x to i1
201  ret i1 %fptoui
202}
203
204
205; i32/i16/i8/i1 --> double
206
207define double @sitofpR_double_0(i32 %x) {
208;
209;
210; CHECK-DF-LABEL: sitofpR_double_0:
211; CHECK-DF:       # %bb.0: # %entry
212; CHECK-DF-NEXT:    fmtvrl vr0, a0
213; CHECK-DF-NEXT:    fsitod vr0, vr0
214; CHECK-DF-NEXT:    rts16
215;
216; CHECK-DF2-LABEL: sitofpR_double_0:
217; CHECK-DF2:       # %bb.0: # %entry
218; CHECK-DF2-NEXT:    fmtvr.32.1 vr0, a0
219; CHECK-DF2-NEXT:    fitof.s32.f64 vr0, vr0
220; CHECK-DF2-NEXT:    rts16
221entry:
222  %sitofp = sitofp i32 %x to double
223  ret double %sitofp
224}
225
226define double @sitofpR_double_1(i16 %x) {
227;
228;
229; CHECK-DF-LABEL: sitofpR_double_1:
230; CHECK-DF:       # %bb.0: # %entry
231; CHECK-DF-NEXT:    sexth16 a0, a0
232; CHECK-DF-NEXT:    fmtvrl vr0, a0
233; CHECK-DF-NEXT:    fsitod vr0, vr0
234; CHECK-DF-NEXT:    rts16
235;
236; CHECK-DF2-LABEL: sitofpR_double_1:
237; CHECK-DF2:       # %bb.0: # %entry
238; CHECK-DF2-NEXT:    sexth16 a0, a0
239; CHECK-DF2-NEXT:    fmtvr.32.1 vr0, a0
240; CHECK-DF2-NEXT:    fitof.s32.f64 vr0, vr0
241; CHECK-DF2-NEXT:    rts16
242entry:
243  %sitofp = sitofp i16 %x to double
244  ret double %sitofp
245}
246
247define double @sitofpR_double_2(i8 %x) {
248;
249;
250; CHECK-DF-LABEL: sitofpR_double_2:
251; CHECK-DF:       # %bb.0: # %entry
252; CHECK-DF-NEXT:    sextb16 a0, a0
253; CHECK-DF-NEXT:    fmtvrl vr0, a0
254; CHECK-DF-NEXT:    fsitod vr0, vr0
255; CHECK-DF-NEXT:    rts16
256;
257; CHECK-DF2-LABEL: sitofpR_double_2:
258; CHECK-DF2:       # %bb.0: # %entry
259; CHECK-DF2-NEXT:    sextb16 a0, a0
260; CHECK-DF2-NEXT:    fmtvr.32.1 vr0, a0
261; CHECK-DF2-NEXT:    fitof.s32.f64 vr0, vr0
262; CHECK-DF2-NEXT:    rts16
263entry:
264  %sitofp = sitofp i8 %x to double
265  ret double %sitofp
266}
267
268define double @sitofpR_double_3(i1 %x) {
269;
270;
271; CHECK-DF-LABEL: sitofpR_double_3:
272; CHECK-DF:       # %bb.0: # %entry
273; CHECK-DF-NEXT:    sext32 a0, a0, 0, 0
274; CHECK-DF-NEXT:    fmtvrl vr0, a0
275; CHECK-DF-NEXT:    fsitod vr0, vr0
276; CHECK-DF-NEXT:    rts16
277;
278; CHECK-DF2-LABEL: sitofpR_double_3:
279; CHECK-DF2:       # %bb.0: # %entry
280; CHECK-DF2-NEXT:    sext32 a0, a0, 0, 0
281; CHECK-DF2-NEXT:    fmtvr.32.1 vr0, a0
282; CHECK-DF2-NEXT:    fitof.s32.f64 vr0, vr0
283; CHECK-DF2-NEXT:    rts16
284entry:
285  %sitofp = sitofp i1 %x to double
286  ret double %sitofp
287}
288
289; i32/i16/i8/i1 --> double
290
291define double @uitofpR_double_0(i32 %x) {
292;
293;
294; CHECK-DF-LABEL: uitofpR_double_0:
295; CHECK-DF:       # %bb.0: # %entry
296; CHECK-DF-NEXT:    fmtvrl vr0, a0
297; CHECK-DF-NEXT:    fuitod vr0, vr0
298; CHECK-DF-NEXT:    rts16
299;
300; CHECK-DF2-LABEL: uitofpR_double_0:
301; CHECK-DF2:       # %bb.0: # %entry
302; CHECK-DF2-NEXT:    fmtvr.32.1 vr0, a0
303; CHECK-DF2-NEXT:    fitof.u32.f64 vr0, vr0
304; CHECK-DF2-NEXT:    rts16
305entry:
306  %uitofp = uitofp i32 %x to double
307  ret double %uitofp
308}
309
310define double @uitofpR_double_1(i16 %x) {
311;
312;
313; CHECK-DF-LABEL: uitofpR_double_1:
314; CHECK-DF:       # %bb.0: # %entry
315; CHECK-DF-NEXT:    zexth16 a0, a0
316; CHECK-DF-NEXT:    fmtvrl vr0, a0
317; CHECK-DF-NEXT:    fuitod vr0, vr0
318; CHECK-DF-NEXT:    rts16
319;
320; CHECK-DF2-LABEL: uitofpR_double_1:
321; CHECK-DF2:       # %bb.0: # %entry
322; CHECK-DF2-NEXT:    zexth16 a0, a0
323; CHECK-DF2-NEXT:    fmtvr.32.1 vr0, a0
324; CHECK-DF2-NEXT:    fitof.u32.f64 vr0, vr0
325; CHECK-DF2-NEXT:    rts16
326entry:
327  %uitofp = uitofp i16 %x to double
328  ret double %uitofp
329}
330
331define double @uitofpR_double_2(i8 %x) {
332;
333;
334; CHECK-DF-LABEL: uitofpR_double_2:
335; CHECK-DF:       # %bb.0: # %entry
336; CHECK-DF-NEXT:    zextb16 a0, a0
337; CHECK-DF-NEXT:    fmtvrl vr0, a0
338; CHECK-DF-NEXT:    fuitod vr0, vr0
339; CHECK-DF-NEXT:    rts16
340;
341; CHECK-DF2-LABEL: uitofpR_double_2:
342; CHECK-DF2:       # %bb.0: # %entry
343; CHECK-DF2-NEXT:    zextb16 a0, a0
344; CHECK-DF2-NEXT:    fmtvr.32.1 vr0, a0
345; CHECK-DF2-NEXT:    fitof.u32.f64 vr0, vr0
346; CHECK-DF2-NEXT:    rts16
347entry:
348  %uitofp = uitofp i8 %x to double
349  ret double %uitofp
350}
351
352define double @uitofpR_double_3(i1 %x) {
353;
354;
355; CHECK-DF-LABEL: uitofpR_double_3:
356; CHECK-DF:       # %bb.0: # %entry
357; CHECK-DF-NEXT:    andi32 a0, a0, 1
358; CHECK-DF-NEXT:    fmtvrl vr0, a0
359; CHECK-DF-NEXT:    fuitod vr0, vr0
360; CHECK-DF-NEXT:    rts16
361;
362; CHECK-DF2-LABEL: uitofpR_double_3:
363; CHECK-DF2:       # %bb.0: # %entry
364; CHECK-DF2-NEXT:    andi32 a0, a0, 1
365; CHECK-DF2-NEXT:    fmtvr.32.1 vr0, a0
366; CHECK-DF2-NEXT:    fitof.u32.f64 vr0, vr0
367; CHECK-DF2-NEXT:    rts16
368entry:
369  %uitofp = uitofp i1 %x to double
370  ret double %uitofp
371}
372