1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc -verify-machineinstrs -csky-no-aliases < %s -mtriple=csky -float-abi=hard -mattr=+hard-float -mattr=+2e3 -mattr=+fpuv2_sf | FileCheck %s --check-prefix=CHECK-SF 3; RUN: llc -verify-machineinstrs -csky-no-aliases < %s -mtriple=csky -float-abi=hard -mattr=+hard-float -mattr=+2e3 -mattr=+fpuv3_sf | FileCheck %s --check-prefix=CHECK-SF2 4 5;OEQ 6define i32 @brRR_oeq(float %x, float %y) { 7; 8; CHECK-SF-LABEL: brRR_oeq: 9; CHECK-SF: # %bb.0: # %entry 10; CHECK-SF-NEXT: fcmpnes vr1, vr0 11; CHECK-SF-NEXT: bt32 .LBB0_2 12; CHECK-SF-NEXT: # %bb.1: # %label1 13; CHECK-SF-NEXT: movi16 a0, 1 14; CHECK-SF-NEXT: rts16 15; CHECK-SF-NEXT: .LBB0_2: # %label2 16; CHECK-SF-NEXT: movi16 a0, 0 17; CHECK-SF-NEXT: rts16 18; 19; CHECK-SF2-LABEL: brRR_oeq: 20; CHECK-SF2: # %bb.0: # %entry 21; CHECK-SF2-NEXT: fcmpne.32 vr1, vr0 22; CHECK-SF2-NEXT: bt32 .LBB0_2 23; CHECK-SF2-NEXT: # %bb.1: # %label1 24; CHECK-SF2-NEXT: movi16 a0, 1 25; CHECK-SF2-NEXT: rts16 26; CHECK-SF2-NEXT: .LBB0_2: # %label2 27; CHECK-SF2-NEXT: movi16 a0, 0 28; CHECK-SF2-NEXT: rts16 29entry: 30 %fcmp = fcmp oeq float %y, %x 31 br i1 %fcmp, label %label1, label %label2 32label1: 33 ret i32 1 34label2: 35 ret i32 0 36} 37 38define i32 @brRI_oeq(float %x) { 39; 40; CHECK-SF-LABEL: brRI_oeq: 41; CHECK-SF: # %bb.0: # %entry 42; CHECK-SF-NEXT: movih32 a0, 16672 43; CHECK-SF-NEXT: fmtvrl vr1, a0 44; CHECK-SF-NEXT: fcmpnes vr0, vr1 45; CHECK-SF-NEXT: bt32 .LBB1_2 46; CHECK-SF-NEXT: # %bb.1: # %label1 47; CHECK-SF-NEXT: movi16 a0, 1 48; CHECK-SF-NEXT: rts16 49; CHECK-SF-NEXT: .LBB1_2: # %label2 50; CHECK-SF-NEXT: movi16 a0, 0 51; CHECK-SF-NEXT: rts16 52; 53; CHECK-SF2-LABEL: brRI_oeq: 54; CHECK-SF2: # %bb.0: # %entry 55; CHECK-SF2-NEXT: movih32 a0, 16672 56; CHECK-SF2-NEXT: fmtvr.32.1 vr1, a0 57; CHECK-SF2-NEXT: fcmpne.32 vr0, vr1 58; CHECK-SF2-NEXT: bt32 .LBB1_2 59; CHECK-SF2-NEXT: # %bb.1: # %label1 60; CHECK-SF2-NEXT: movi16 a0, 1 61; CHECK-SF2-NEXT: rts16 62; CHECK-SF2-NEXT: .LBB1_2: # %label2 63; CHECK-SF2-NEXT: movi16 a0, 0 64; CHECK-SF2-NEXT: rts16 65entry: 66 %fcmp = fcmp oeq float %x, 10.0 67 br i1 %fcmp, label %label1, label %label2 68label1: 69 ret i32 1 70label2: 71 ret i32 0 72} 73 74define i32 @brR0_oeq(float %x) { 75; 76; CHECK-SF-LABEL: brR0_oeq: 77; CHECK-SF: # %bb.0: # %entry 78; CHECK-SF-NEXT: fcmpznes vr0 79; CHECK-SF-NEXT: bt32 .LBB2_2 80; CHECK-SF-NEXT: # %bb.1: # %label1 81; CHECK-SF-NEXT: movi16 a0, 1 82; CHECK-SF-NEXT: rts16 83; CHECK-SF-NEXT: .LBB2_2: # %label2 84; CHECK-SF-NEXT: movi16 a0, 0 85; CHECK-SF-NEXT: rts16 86; 87; CHECK-SF2-LABEL: brR0_oeq: 88; CHECK-SF2: # %bb.0: # %entry 89; CHECK-SF2-NEXT: fcmpnez.32 vr0 90; CHECK-SF2-NEXT: bt32 .LBB2_2 91; CHECK-SF2-NEXT: # %bb.1: # %label1 92; CHECK-SF2-NEXT: movi16 a0, 1 93; CHECK-SF2-NEXT: rts16 94; CHECK-SF2-NEXT: .LBB2_2: # %label2 95; CHECK-SF2-NEXT: movi16 a0, 0 96; CHECK-SF2-NEXT: rts16 97entry: 98 %fcmp = fcmp oeq float %x, 0.0 99 br i1 %fcmp, label %label1, label %label2 100label1: 101 ret i32 1 102label2: 103 ret i32 0 104} 105 106;NE 107define i32 @brRR_one(float %x, float %y) { 108; 109; CHECK-SF-LABEL: brRR_one: 110; CHECK-SF: # %bb.0: # %entry 111; CHECK-SF-NEXT: fcmpuos vr1, vr0 112; CHECK-SF-NEXT: mvc32 a0 113; CHECK-SF-NEXT: fcmpnes vr1, vr0 114; CHECK-SF-NEXT: mvcv16 a1 115; CHECK-SF-NEXT: or16 a0, a1 116; CHECK-SF-NEXT: btsti16 a0, 0 117; CHECK-SF-NEXT: bt32 .LBB3_2 118; CHECK-SF-NEXT: # %bb.1: # %label1 119; CHECK-SF-NEXT: movi16 a0, 1 120; CHECK-SF-NEXT: rts16 121; CHECK-SF-NEXT: .LBB3_2: # %label2 122; CHECK-SF-NEXT: movi16 a0, 0 123; CHECK-SF-NEXT: rts16 124; 125; CHECK-SF2-LABEL: brRR_one: 126; CHECK-SF2: # %bb.0: # %entry 127; CHECK-SF2-NEXT: fcmpuo.32 vr1, vr0 128; CHECK-SF2-NEXT: mvc32 a0 129; CHECK-SF2-NEXT: fcmpne.32 vr1, vr0 130; CHECK-SF2-NEXT: mvcv16 a1 131; CHECK-SF2-NEXT: or16 a0, a1 132; CHECK-SF2-NEXT: btsti16 a0, 0 133; CHECK-SF2-NEXT: bt32 .LBB3_2 134; CHECK-SF2-NEXT: # %bb.1: # %label1 135; CHECK-SF2-NEXT: movi16 a0, 1 136; CHECK-SF2-NEXT: rts16 137; CHECK-SF2-NEXT: .LBB3_2: # %label2 138; CHECK-SF2-NEXT: movi16 a0, 0 139; CHECK-SF2-NEXT: rts16 140entry: 141 %fcmp = fcmp one float %y, %x 142 br i1 %fcmp, label %label1, label %label2 143label1: 144 ret i32 1 145label2: 146 ret i32 0 147} 148 149define i32 @brRI_one(float %x) { 150; 151; CHECK-SF-LABEL: brRI_one: 152; CHECK-SF: # %bb.0: # %entry 153; CHECK-SF-NEXT: movih32 a0, 16672 154; CHECK-SF-NEXT: fmtvrl vr1, a0 155; CHECK-SF-NEXT: fcmpnes vr0, vr1 156; CHECK-SF-NEXT: mvcv16 a0 157; CHECK-SF-NEXT: fcmpuos vr0, vr0 158; CHECK-SF-NEXT: mvc32 a1 159; CHECK-SF-NEXT: or16 a0, a1 160; CHECK-SF-NEXT: btsti16 a0, 0 161; CHECK-SF-NEXT: bt32 .LBB4_2 162; CHECK-SF-NEXT: # %bb.1: # %label1 163; CHECK-SF-NEXT: movi16 a0, 1 164; CHECK-SF-NEXT: rts16 165; CHECK-SF-NEXT: .LBB4_2: # %label2 166; CHECK-SF-NEXT: movi16 a0, 0 167; CHECK-SF-NEXT: rts16 168; 169; CHECK-SF2-LABEL: brRI_one: 170; CHECK-SF2: # %bb.0: # %entry 171; CHECK-SF2-NEXT: movih32 a0, 16672 172; CHECK-SF2-NEXT: fmtvr.32.1 vr1, a0 173; CHECK-SF2-NEXT: fcmpne.32 vr0, vr1 174; CHECK-SF2-NEXT: mvcv16 a0 175; CHECK-SF2-NEXT: fcmpuo.32 vr0, vr0 176; CHECK-SF2-NEXT: mvc32 a1 177; CHECK-SF2-NEXT: or16 a0, a1 178; CHECK-SF2-NEXT: btsti16 a0, 0 179; CHECK-SF2-NEXT: bt32 .LBB4_2 180; CHECK-SF2-NEXT: # %bb.1: # %label1 181; CHECK-SF2-NEXT: movi16 a0, 1 182; CHECK-SF2-NEXT: rts16 183; CHECK-SF2-NEXT: .LBB4_2: # %label2 184; CHECK-SF2-NEXT: movi16 a0, 0 185; CHECK-SF2-NEXT: rts16 186entry: 187 %fcmp = fcmp one float %x, 10.0 188 br i1 %fcmp, label %label1, label %label2 189label1: 190 ret i32 1 191label2: 192 ret i32 0 193} 194 195define i32 @brR0_one(float %x) { 196; 197; CHECK-SF-LABEL: brR0_one: 198; CHECK-SF: # %bb.0: # %entry 199; CHECK-SF-NEXT: fcmpuos vr0, vr0 200; CHECK-SF-NEXT: mvc32 a0 201; CHECK-SF-NEXT: fcmpznes vr0 202; CHECK-SF-NEXT: mvcv16 a1 203; CHECK-SF-NEXT: or16 a0, a1 204; CHECK-SF-NEXT: btsti16 a0, 0 205; CHECK-SF-NEXT: bt32 .LBB5_2 206; CHECK-SF-NEXT: # %bb.1: # %label1 207; CHECK-SF-NEXT: movi16 a0, 1 208; CHECK-SF-NEXT: rts16 209; CHECK-SF-NEXT: .LBB5_2: # %label2 210; CHECK-SF-NEXT: movi16 a0, 0 211; CHECK-SF-NEXT: rts16 212; 213; CHECK-SF2-LABEL: brR0_one: 214; CHECK-SF2: # %bb.0: # %entry 215; CHECK-SF2-NEXT: fcmpuo.32 vr0, vr0 216; CHECK-SF2-NEXT: mvc32 a0 217; CHECK-SF2-NEXT: fcmpnez.32 vr0 218; CHECK-SF2-NEXT: mvcv16 a1 219; CHECK-SF2-NEXT: or16 a0, a1 220; CHECK-SF2-NEXT: btsti16 a0, 0 221; CHECK-SF2-NEXT: bt32 .LBB5_2 222; CHECK-SF2-NEXT: # %bb.1: # %label1 223; CHECK-SF2-NEXT: movi16 a0, 1 224; CHECK-SF2-NEXT: rts16 225; CHECK-SF2-NEXT: .LBB5_2: # %label2 226; CHECK-SF2-NEXT: movi16 a0, 0 227; CHECK-SF2-NEXT: rts16 228entry: 229 %fcmp = fcmp one float %x, 0.0 230 br i1 %fcmp, label %label1, label %label2 231label1: 232 ret i32 1 233label2: 234 ret i32 0 235} 236 237;UGT 238define i32 @brRR_ugt(float %x, float %y) { 239; 240; CHECK-SF-LABEL: brRR_ugt: 241; CHECK-SF: # %bb.0: # %entry 242; CHECK-SF-NEXT: fcmphss vr0, vr1 243; CHECK-SF-NEXT: bt32 .LBB6_2 244; CHECK-SF-NEXT: # %bb.1: # %label1 245; CHECK-SF-NEXT: movi16 a0, 1 246; CHECK-SF-NEXT: rts16 247; CHECK-SF-NEXT: .LBB6_2: # %label2 248; CHECK-SF-NEXT: movi16 a0, 0 249; CHECK-SF-NEXT: rts16 250; 251; CHECK-SF2-LABEL: brRR_ugt: 252; CHECK-SF2: # %bb.0: # %entry 253; CHECK-SF2-NEXT: fcmphs.32 vr0, vr1 254; CHECK-SF2-NEXT: bt32 .LBB6_2 255; CHECK-SF2-NEXT: # %bb.1: # %label1 256; CHECK-SF2-NEXT: movi16 a0, 1 257; CHECK-SF2-NEXT: rts16 258; CHECK-SF2-NEXT: .LBB6_2: # %label2 259; CHECK-SF2-NEXT: movi16 a0, 0 260; CHECK-SF2-NEXT: rts16 261entry: 262 %fcmp = fcmp ugt float %y, %x 263 br i1 %fcmp, label %label1, label %label2 264label1: 265 ret i32 1 266label2: 267 ret i32 0 268} 269 270define i32 @brRI_ugt(float %x) { 271; 272; CHECK-SF-LABEL: brRI_ugt: 273; CHECK-SF: # %bb.0: # %entry 274; CHECK-SF-NEXT: movih32 a0, 16672 275; CHECK-SF-NEXT: fmtvrl vr1, a0 276; CHECK-SF-NEXT: fcmphss vr1, vr0 277; CHECK-SF-NEXT: bt32 .LBB7_2 278; CHECK-SF-NEXT: # %bb.1: # %label1 279; CHECK-SF-NEXT: movi16 a0, 1 280; CHECK-SF-NEXT: rts16 281; CHECK-SF-NEXT: .LBB7_2: # %label2 282; CHECK-SF-NEXT: movi16 a0, 0 283; CHECK-SF-NEXT: rts16 284; 285; CHECK-SF2-LABEL: brRI_ugt: 286; CHECK-SF2: # %bb.0: # %entry 287; CHECK-SF2-NEXT: movih32 a0, 16672 288; CHECK-SF2-NEXT: fmtvr.32.1 vr1, a0 289; CHECK-SF2-NEXT: fcmphs.32 vr1, vr0 290; CHECK-SF2-NEXT: bt32 .LBB7_2 291; CHECK-SF2-NEXT: # %bb.1: # %label1 292; CHECK-SF2-NEXT: movi16 a0, 1 293; CHECK-SF2-NEXT: rts16 294; CHECK-SF2-NEXT: .LBB7_2: # %label2 295; CHECK-SF2-NEXT: movi16 a0, 0 296; CHECK-SF2-NEXT: rts16 297entry: 298 %fcmp = fcmp ugt float %x, 10.0 299 br i1 %fcmp, label %label1, label %label2 300label1: 301 ret i32 1 302label2: 303 ret i32 0 304} 305 306define i32 @brR0_ugt(float %x) { 307; 308; CHECK-SF-LABEL: brR0_ugt: 309; CHECK-SF: # %bb.0: # %entry 310; CHECK-SF-NEXT: fcmpzlss vr0 311; CHECK-SF-NEXT: bt32 .LBB8_2 312; CHECK-SF-NEXT: # %bb.1: # %label1 313; CHECK-SF-NEXT: movi16 a0, 1 314; CHECK-SF-NEXT: rts16 315; CHECK-SF-NEXT: .LBB8_2: # %label2 316; CHECK-SF-NEXT: movi16 a0, 0 317; CHECK-SF-NEXT: rts16 318; 319; CHECK-SF2-LABEL: brR0_ugt: 320; CHECK-SF2: # %bb.0: # %entry 321; CHECK-SF2-NEXT: fcmplsz.32 vr0 322; CHECK-SF2-NEXT: bt32 .LBB8_2 323; CHECK-SF2-NEXT: # %bb.1: # %label1 324; CHECK-SF2-NEXT: movi16 a0, 1 325; CHECK-SF2-NEXT: rts16 326; CHECK-SF2-NEXT: .LBB8_2: # %label2 327; CHECK-SF2-NEXT: movi16 a0, 0 328; CHECK-SF2-NEXT: rts16 329entry: 330 %fcmp = fcmp ugt float %x, 0.0 331 br i1 %fcmp, label %label1, label %label2 332label1: 333 ret i32 1 334label2: 335 ret i32 0 336} 337 338;UGE 339define i32 @brRR_uge(float %x, float %y) { 340; 341; CHECK-SF-LABEL: brRR_uge: 342; CHECK-SF: # %bb.0: # %entry 343; CHECK-SF-NEXT: fcmplts vr1, vr0 344; CHECK-SF-NEXT: bt32 .LBB9_2 345; CHECK-SF-NEXT: # %bb.1: # %label1 346; CHECK-SF-NEXT: movi16 a0, 1 347; CHECK-SF-NEXT: rts16 348; CHECK-SF-NEXT: .LBB9_2: # %label2 349; CHECK-SF-NEXT: movi16 a0, 0 350; CHECK-SF-NEXT: rts16 351; 352; CHECK-SF2-LABEL: brRR_uge: 353; CHECK-SF2: # %bb.0: # %entry 354; CHECK-SF2-NEXT: fcmplt.32 vr1, vr0 355; CHECK-SF2-NEXT: bt32 .LBB9_2 356; CHECK-SF2-NEXT: # %bb.1: # %label1 357; CHECK-SF2-NEXT: movi16 a0, 1 358; CHECK-SF2-NEXT: rts16 359; CHECK-SF2-NEXT: .LBB9_2: # %label2 360; CHECK-SF2-NEXT: movi16 a0, 0 361; CHECK-SF2-NEXT: rts16 362entry: 363 %fcmp = fcmp uge float %y, %x 364 br i1 %fcmp, label %label1, label %label2 365label1: 366 ret i32 1 367label2: 368 ret i32 0 369} 370 371define i32 @brRI_uge(float %x) { 372; 373; CHECK-SF-LABEL: brRI_uge: 374; CHECK-SF: # %bb.0: # %entry 375; CHECK-SF-NEXT: movih32 a0, 16672 376; CHECK-SF-NEXT: fmtvrl vr1, a0 377; CHECK-SF-NEXT: fcmplts vr0, vr1 378; CHECK-SF-NEXT: bt32 .LBB10_2 379; CHECK-SF-NEXT: # %bb.1: # %label1 380; CHECK-SF-NEXT: movi16 a0, 1 381; CHECK-SF-NEXT: rts16 382; CHECK-SF-NEXT: .LBB10_2: # %label2 383; CHECK-SF-NEXT: movi16 a0, 0 384; CHECK-SF-NEXT: rts16 385; 386; CHECK-SF2-LABEL: brRI_uge: 387; CHECK-SF2: # %bb.0: # %entry 388; CHECK-SF2-NEXT: movih32 a0, 16672 389; CHECK-SF2-NEXT: fmtvr.32.1 vr1, a0 390; CHECK-SF2-NEXT: fcmplt.32 vr0, vr1 391; CHECK-SF2-NEXT: bt32 .LBB10_2 392; CHECK-SF2-NEXT: # %bb.1: # %label1 393; CHECK-SF2-NEXT: movi16 a0, 1 394; CHECK-SF2-NEXT: rts16 395; CHECK-SF2-NEXT: .LBB10_2: # %label2 396; CHECK-SF2-NEXT: movi16 a0, 0 397; CHECK-SF2-NEXT: rts16 398entry: 399 %fcmp = fcmp uge float %x, 10.0 400 br i1 %fcmp, label %label1, label %label2 401label1: 402 ret i32 1 403label2: 404 ret i32 0 405} 406 407define i32 @brR0_uge(float %x) { 408; 409; CHECK-SF-LABEL: brR0_uge: 410; CHECK-SF: # %bb.0: # %entry 411; CHECK-SF-NEXT: fcmpzhss vr0 412; CHECK-SF-NEXT: bf32 .LBB11_2 413; CHECK-SF-NEXT: # %bb.1: # %label1 414; CHECK-SF-NEXT: movi16 a0, 1 415; CHECK-SF-NEXT: rts16 416; CHECK-SF-NEXT: .LBB11_2: # %label2 417; CHECK-SF-NEXT: movi16 a0, 0 418; CHECK-SF-NEXT: rts16 419; 420; CHECK-SF2-LABEL: brR0_uge: 421; CHECK-SF2: # %bb.0: # %entry 422; CHECK-SF2-NEXT: fcmpltz.32 vr0 423; CHECK-SF2-NEXT: bt32 .LBB11_2 424; CHECK-SF2-NEXT: # %bb.1: # %label1 425; CHECK-SF2-NEXT: movi16 a0, 1 426; CHECK-SF2-NEXT: rts16 427; CHECK-SF2-NEXT: .LBB11_2: # %label2 428; CHECK-SF2-NEXT: movi16 a0, 0 429; CHECK-SF2-NEXT: rts16 430entry: 431 %fcmp = fcmp uge float %x, 0.0 432 br i1 %fcmp, label %label1, label %label2 433label1: 434 ret i32 1 435label2: 436 ret i32 0 437} 438 439;ULT 440define i32 @brRR_ult(float %x, float %y) { 441; 442; CHECK-SF-LABEL: brRR_ult: 443; CHECK-SF: # %bb.0: # %entry 444; CHECK-SF-NEXT: fcmphss vr1, vr0 445; CHECK-SF-NEXT: bt32 .LBB12_2 446; CHECK-SF-NEXT: # %bb.1: # %label1 447; CHECK-SF-NEXT: movi16 a0, 1 448; CHECK-SF-NEXT: rts16 449; CHECK-SF-NEXT: .LBB12_2: # %label2 450; CHECK-SF-NEXT: movi16 a0, 0 451; CHECK-SF-NEXT: rts16 452; 453; CHECK-SF2-LABEL: brRR_ult: 454; CHECK-SF2: # %bb.0: # %entry 455; CHECK-SF2-NEXT: fcmphs.32 vr1, vr0 456; CHECK-SF2-NEXT: bt32 .LBB12_2 457; CHECK-SF2-NEXT: # %bb.1: # %label1 458; CHECK-SF2-NEXT: movi16 a0, 1 459; CHECK-SF2-NEXT: rts16 460; CHECK-SF2-NEXT: .LBB12_2: # %label2 461; CHECK-SF2-NEXT: movi16 a0, 0 462; CHECK-SF2-NEXT: rts16 463entry: 464 %fcmp = fcmp ult float %y, %x 465 br i1 %fcmp, label %label1, label %label2 466label1: 467 ret i32 1 468label2: 469 ret i32 0 470} 471 472define i32 @brRI_ult(float %x) { 473; 474; CHECK-SF-LABEL: brRI_ult: 475; CHECK-SF: # %bb.0: # %entry 476; CHECK-SF-NEXT: movih32 a0, 16672 477; CHECK-SF-NEXT: fmtvrl vr1, a0 478; CHECK-SF-NEXT: fcmphss vr0, vr1 479; CHECK-SF-NEXT: bt32 .LBB13_2 480; CHECK-SF-NEXT: # %bb.1: # %label1 481; CHECK-SF-NEXT: movi16 a0, 1 482; CHECK-SF-NEXT: rts16 483; CHECK-SF-NEXT: .LBB13_2: # %label2 484; CHECK-SF-NEXT: movi16 a0, 0 485; CHECK-SF-NEXT: rts16 486; 487; CHECK-SF2-LABEL: brRI_ult: 488; CHECK-SF2: # %bb.0: # %entry 489; CHECK-SF2-NEXT: movih32 a0, 16672 490; CHECK-SF2-NEXT: fmtvr.32.1 vr1, a0 491; CHECK-SF2-NEXT: fcmphs.32 vr0, vr1 492; CHECK-SF2-NEXT: bt32 .LBB13_2 493; CHECK-SF2-NEXT: # %bb.1: # %label1 494; CHECK-SF2-NEXT: movi16 a0, 1 495; CHECK-SF2-NEXT: rts16 496; CHECK-SF2-NEXT: .LBB13_2: # %label2 497; CHECK-SF2-NEXT: movi16 a0, 0 498; CHECK-SF2-NEXT: rts16 499entry: 500 %fcmp = fcmp ult float %x, 10.0 501 br i1 %fcmp, label %label1, label %label2 502label1: 503 ret i32 1 504label2: 505 ret i32 0 506} 507 508define i32 @brR0_ult(float %x) { 509; 510; CHECK-SF-LABEL: brR0_ult: 511; CHECK-SF: # %bb.0: # %entry 512; CHECK-SF-NEXT: fcmpzhss vr0 513; CHECK-SF-NEXT: bt32 .LBB14_2 514; CHECK-SF-NEXT: # %bb.1: # %label1 515; CHECK-SF-NEXT: movi16 a0, 1 516; CHECK-SF-NEXT: rts16 517; CHECK-SF-NEXT: .LBB14_2: # %label2 518; CHECK-SF-NEXT: movi16 a0, 0 519; CHECK-SF-NEXT: rts16 520; 521; CHECK-SF2-LABEL: brR0_ult: 522; CHECK-SF2: # %bb.0: # %entry 523; CHECK-SF2-NEXT: fcmphsz.32 vr0 524; CHECK-SF2-NEXT: bt32 .LBB14_2 525; CHECK-SF2-NEXT: # %bb.1: # %label1 526; CHECK-SF2-NEXT: movi16 a0, 1 527; CHECK-SF2-NEXT: rts16 528; CHECK-SF2-NEXT: .LBB14_2: # %label2 529; CHECK-SF2-NEXT: movi16 a0, 0 530; CHECK-SF2-NEXT: rts16 531entry: 532 %fcmp = fcmp ult float %x, 0.0 533 br i1 %fcmp, label %label1, label %label2 534label1: 535 ret i32 1 536label2: 537 ret i32 0 538} 539 540;ULE 541define i32 @brRR_ule(float %x, float %y) { 542; 543; CHECK-SF-LABEL: brRR_ule: 544; CHECK-SF: # %bb.0: # %entry 545; CHECK-SF-NEXT: fcmplts vr0, vr1 546; CHECK-SF-NEXT: bt32 .LBB15_2 547; CHECK-SF-NEXT: # %bb.1: # %label1 548; CHECK-SF-NEXT: movi16 a0, 1 549; CHECK-SF-NEXT: rts16 550; CHECK-SF-NEXT: .LBB15_2: # %label2 551; CHECK-SF-NEXT: movi16 a0, 0 552; CHECK-SF-NEXT: rts16 553; 554; CHECK-SF2-LABEL: brRR_ule: 555; CHECK-SF2: # %bb.0: # %entry 556; CHECK-SF2-NEXT: fcmplt.32 vr0, vr1 557; CHECK-SF2-NEXT: bt32 .LBB15_2 558; CHECK-SF2-NEXT: # %bb.1: # %label1 559; CHECK-SF2-NEXT: movi16 a0, 1 560; CHECK-SF2-NEXT: rts16 561; CHECK-SF2-NEXT: .LBB15_2: # %label2 562; CHECK-SF2-NEXT: movi16 a0, 0 563; CHECK-SF2-NEXT: rts16 564entry: 565 %fcmp = fcmp ule float %y, %x 566 br i1 %fcmp, label %label1, label %label2 567label1: 568 ret i32 1 569label2: 570 ret i32 0 571} 572 573define i32 @brRI_ule(float %x) { 574; 575; CHECK-SF-LABEL: brRI_ule: 576; CHECK-SF: # %bb.0: # %entry 577; CHECK-SF-NEXT: movih32 a0, 16672 578; CHECK-SF-NEXT: fmtvrl vr1, a0 579; CHECK-SF-NEXT: fcmplts vr1, vr0 580; CHECK-SF-NEXT: bt32 .LBB16_2 581; CHECK-SF-NEXT: # %bb.1: # %label1 582; CHECK-SF-NEXT: movi16 a0, 1 583; CHECK-SF-NEXT: rts16 584; CHECK-SF-NEXT: .LBB16_2: # %label2 585; CHECK-SF-NEXT: movi16 a0, 0 586; CHECK-SF-NEXT: rts16 587; 588; CHECK-SF2-LABEL: brRI_ule: 589; CHECK-SF2: # %bb.0: # %entry 590; CHECK-SF2-NEXT: movih32 a0, 16672 591; CHECK-SF2-NEXT: fmtvr.32.1 vr1, a0 592; CHECK-SF2-NEXT: fcmplt.32 vr1, vr0 593; CHECK-SF2-NEXT: bt32 .LBB16_2 594; CHECK-SF2-NEXT: # %bb.1: # %label1 595; CHECK-SF2-NEXT: movi16 a0, 1 596; CHECK-SF2-NEXT: rts16 597; CHECK-SF2-NEXT: .LBB16_2: # %label2 598; CHECK-SF2-NEXT: movi16 a0, 0 599; CHECK-SF2-NEXT: rts16 600entry: 601 %fcmp = fcmp ule float %x, 10.0 602 br i1 %fcmp, label %label1, label %label2 603label1: 604 ret i32 1 605label2: 606 ret i32 0 607} 608 609define i32 @brR0_ule(float %x) { 610; 611; CHECK-SF-LABEL: brR0_ule: 612; CHECK-SF: # %bb.0: # %entry 613; CHECK-SF-NEXT: fcmpzlss vr0 614; CHECK-SF-NEXT: bf32 .LBB17_2 615; CHECK-SF-NEXT: # %bb.1: # %label1 616; CHECK-SF-NEXT: movi16 a0, 1 617; CHECK-SF-NEXT: rts16 618; CHECK-SF-NEXT: .LBB17_2: # %label2 619; CHECK-SF-NEXT: movi16 a0, 0 620; CHECK-SF-NEXT: rts16 621; 622; CHECK-SF2-LABEL: brR0_ule: 623; CHECK-SF2: # %bb.0: # %entry 624; CHECK-SF2-NEXT: fcmphz.32 vr0 625; CHECK-SF2-NEXT: bt32 .LBB17_2 626; CHECK-SF2-NEXT: # %bb.1: # %label1 627; CHECK-SF2-NEXT: movi16 a0, 1 628; CHECK-SF2-NEXT: rts16 629; CHECK-SF2-NEXT: .LBB17_2: # %label2 630; CHECK-SF2-NEXT: movi16 a0, 0 631; CHECK-SF2-NEXT: rts16 632entry: 633 %fcmp = fcmp ule float %x, 0.0 634 br i1 %fcmp, label %label1, label %label2 635label1: 636 ret i32 1 637label2: 638 ret i32 0 639} 640 641;SGT 642define i32 @brRR_ogt(float %x, float %y) { 643; 644; CHECK-SF-LABEL: brRR_ogt: 645; CHECK-SF: # %bb.0: # %entry 646; CHECK-SF-NEXT: fcmplts vr0, vr1 647; CHECK-SF-NEXT: bf32 .LBB18_2 648; CHECK-SF-NEXT: # %bb.1: # %label1 649; CHECK-SF-NEXT: movi16 a0, 1 650; CHECK-SF-NEXT: rts16 651; CHECK-SF-NEXT: .LBB18_2: # %label2 652; CHECK-SF-NEXT: movi16 a0, 0 653; CHECK-SF-NEXT: rts16 654; 655; CHECK-SF2-LABEL: brRR_ogt: 656; CHECK-SF2: # %bb.0: # %entry 657; CHECK-SF2-NEXT: fcmplt.32 vr0, vr1 658; CHECK-SF2-NEXT: bf32 .LBB18_2 659; CHECK-SF2-NEXT: # %bb.1: # %label1 660; CHECK-SF2-NEXT: movi16 a0, 1 661; CHECK-SF2-NEXT: rts16 662; CHECK-SF2-NEXT: .LBB18_2: # %label2 663; CHECK-SF2-NEXT: movi16 a0, 0 664; CHECK-SF2-NEXT: rts16 665entry: 666 %fcmp = fcmp ogt float %y, %x 667 br i1 %fcmp, label %label1, label %label2 668label1: 669 ret i32 1 670label2: 671 ret i32 0 672} 673 674define i32 @brRI_ogt(float %x) { 675; 676; CHECK-SF-LABEL: brRI_ogt: 677; CHECK-SF: # %bb.0: # %entry 678; CHECK-SF-NEXT: movih32 a0, 16672 679; CHECK-SF-NEXT: fmtvrl vr1, a0 680; CHECK-SF-NEXT: fcmplts vr1, vr0 681; CHECK-SF-NEXT: bf32 .LBB19_2 682; CHECK-SF-NEXT: # %bb.1: # %label1 683; CHECK-SF-NEXT: movi16 a0, 1 684; CHECK-SF-NEXT: rts16 685; CHECK-SF-NEXT: .LBB19_2: # %label2 686; CHECK-SF-NEXT: movi16 a0, 0 687; CHECK-SF-NEXT: rts16 688; 689; CHECK-SF2-LABEL: brRI_ogt: 690; CHECK-SF2: # %bb.0: # %entry 691; CHECK-SF2-NEXT: movih32 a0, 16672 692; CHECK-SF2-NEXT: fmtvr.32.1 vr1, a0 693; CHECK-SF2-NEXT: fcmplt.32 vr1, vr0 694; CHECK-SF2-NEXT: bf32 .LBB19_2 695; CHECK-SF2-NEXT: # %bb.1: # %label1 696; CHECK-SF2-NEXT: movi16 a0, 1 697; CHECK-SF2-NEXT: rts16 698; CHECK-SF2-NEXT: .LBB19_2: # %label2 699; CHECK-SF2-NEXT: movi16 a0, 0 700; CHECK-SF2-NEXT: rts16 701entry: 702 %fcmp = fcmp ogt float %x, 10.0 703 br i1 %fcmp, label %label1, label %label2 704label1: 705 ret i32 1 706label2: 707 ret i32 0 708} 709 710define i32 @brR0_ogt(float %x) { 711; 712; CHECK-SF-LABEL: brR0_ogt: 713; CHECK-SF: # %bb.0: # %entry 714; CHECK-SF-NEXT: movi16 a0, 0 715; CHECK-SF-NEXT: fmtvrl vr1, a0 716; CHECK-SF-NEXT: fcmplts vr1, vr0 717; CHECK-SF-NEXT: bf32 .LBB20_2 718; CHECK-SF-NEXT: # %bb.1: # %label1 719; CHECK-SF-NEXT: movi16 a0, 1 720; CHECK-SF-NEXT: .LBB20_2: # %label2 721; CHECK-SF-NEXT: rts16 722; 723; CHECK-SF2-LABEL: brR0_ogt: 724; CHECK-SF2: # %bb.0: # %entry 725; CHECK-SF2-NEXT: movi16 a0, 0 726; CHECK-SF2-NEXT: fmtvr.32.1 vr1, a0 727; CHECK-SF2-NEXT: fcmplt.32 vr1, vr0 728; CHECK-SF2-NEXT: bf32 .LBB20_2 729; CHECK-SF2-NEXT: # %bb.1: # %label1 730; CHECK-SF2-NEXT: movi16 a0, 1 731; CHECK-SF2-NEXT: .LBB20_2: # %label2 732; CHECK-SF2-NEXT: rts16 733entry: 734 %fcmp = fcmp ogt float %x, 0.0 735 br i1 %fcmp, label %label1, label %label2 736label1: 737 ret i32 1 738label2: 739 ret i32 0 740} 741 742;SGE 743define i32 @brRR_oge(float %x, float %y) { 744; 745; CHECK-SF-LABEL: brRR_oge: 746; CHECK-SF: # %bb.0: # %entry 747; CHECK-SF-NEXT: fcmphss vr1, vr0 748; CHECK-SF-NEXT: bf32 .LBB21_2 749; CHECK-SF-NEXT: # %bb.1: # %label1 750; CHECK-SF-NEXT: movi16 a0, 1 751; CHECK-SF-NEXT: rts16 752; CHECK-SF-NEXT: .LBB21_2: # %label2 753; CHECK-SF-NEXT: movi16 a0, 0 754; CHECK-SF-NEXT: rts16 755; 756; CHECK-SF2-LABEL: brRR_oge: 757; CHECK-SF2: # %bb.0: # %entry 758; CHECK-SF2-NEXT: fcmphs.32 vr1, vr0 759; CHECK-SF2-NEXT: bf32 .LBB21_2 760; CHECK-SF2-NEXT: # %bb.1: # %label1 761; CHECK-SF2-NEXT: movi16 a0, 1 762; CHECK-SF2-NEXT: rts16 763; CHECK-SF2-NEXT: .LBB21_2: # %label2 764; CHECK-SF2-NEXT: movi16 a0, 0 765; CHECK-SF2-NEXT: rts16 766entry: 767 %fcmp = fcmp oge float %y, %x 768 br i1 %fcmp, label %label1, label %label2 769label1: 770 ret i32 1 771label2: 772 ret i32 0 773} 774 775define i32 @brRI_oge(float %x) { 776; 777; CHECK-SF-LABEL: brRI_oge: 778; CHECK-SF: # %bb.0: # %entry 779; CHECK-SF-NEXT: movih32 a0, 16672 780; CHECK-SF-NEXT: fmtvrl vr1, a0 781; CHECK-SF-NEXT: fcmphss vr0, vr1 782; CHECK-SF-NEXT: bf32 .LBB22_2 783; CHECK-SF-NEXT: # %bb.1: # %label1 784; CHECK-SF-NEXT: movi16 a0, 1 785; CHECK-SF-NEXT: rts16 786; CHECK-SF-NEXT: .LBB22_2: # %label2 787; CHECK-SF-NEXT: movi16 a0, 0 788; CHECK-SF-NEXT: rts16 789; 790; CHECK-SF2-LABEL: brRI_oge: 791; CHECK-SF2: # %bb.0: # %entry 792; CHECK-SF2-NEXT: movih32 a0, 16672 793; CHECK-SF2-NEXT: fmtvr.32.1 vr1, a0 794; CHECK-SF2-NEXT: fcmphs.32 vr0, vr1 795; CHECK-SF2-NEXT: bf32 .LBB22_2 796; CHECK-SF2-NEXT: # %bb.1: # %label1 797; CHECK-SF2-NEXT: movi16 a0, 1 798; CHECK-SF2-NEXT: rts16 799; CHECK-SF2-NEXT: .LBB22_2: # %label2 800; CHECK-SF2-NEXT: movi16 a0, 0 801; CHECK-SF2-NEXT: rts16 802entry: 803 %fcmp = fcmp oge float %x, 10.0 804 br i1 %fcmp, label %label1, label %label2 805label1: 806 ret i32 1 807label2: 808 ret i32 0 809} 810 811define i32 @brR0_oge(float %x) { 812; 813; CHECK-SF-LABEL: brR0_oge: 814; CHECK-SF: # %bb.0: # %entry 815; CHECK-SF-NEXT: movi16 a0, 0 816; CHECK-SF-NEXT: fmtvrl vr1, a0 817; CHECK-SF-NEXT: fcmphss vr0, vr1 818; CHECK-SF-NEXT: bf32 .LBB23_2 819; CHECK-SF-NEXT: # %bb.1: # %label1 820; CHECK-SF-NEXT: movi16 a0, 1 821; CHECK-SF-NEXT: .LBB23_2: # %label2 822; CHECK-SF-NEXT: rts16 823; 824; CHECK-SF2-LABEL: brR0_oge: 825; CHECK-SF2: # %bb.0: # %entry 826; CHECK-SF2-NEXT: movi16 a0, 0 827; CHECK-SF2-NEXT: fmtvr.32.1 vr1, a0 828; CHECK-SF2-NEXT: fcmphs.32 vr0, vr1 829; CHECK-SF2-NEXT: bf32 .LBB23_2 830; CHECK-SF2-NEXT: # %bb.1: # %label1 831; CHECK-SF2-NEXT: movi16 a0, 1 832; CHECK-SF2-NEXT: .LBB23_2: # %label2 833; CHECK-SF2-NEXT: rts16 834entry: 835 %fcmp = fcmp oge float %x, 0.0 836 br i1 %fcmp, label %label1, label %label2 837label1: 838 ret i32 1 839label2: 840 ret i32 0 841} 842 843;SLT 844define i32 @brRR_olt(float %x, float %y) { 845; 846; CHECK-SF-LABEL: brRR_olt: 847; CHECK-SF: # %bb.0: # %entry 848; CHECK-SF-NEXT: fcmplts vr1, vr0 849; CHECK-SF-NEXT: bf32 .LBB24_2 850; CHECK-SF-NEXT: # %bb.1: # %label1 851; CHECK-SF-NEXT: movi16 a0, 1 852; CHECK-SF-NEXT: rts16 853; CHECK-SF-NEXT: .LBB24_2: # %label2 854; CHECK-SF-NEXT: movi16 a0, 0 855; CHECK-SF-NEXT: rts16 856; 857; CHECK-SF2-LABEL: brRR_olt: 858; CHECK-SF2: # %bb.0: # %entry 859; CHECK-SF2-NEXT: fcmplt.32 vr1, vr0 860; CHECK-SF2-NEXT: bf32 .LBB24_2 861; CHECK-SF2-NEXT: # %bb.1: # %label1 862; CHECK-SF2-NEXT: movi16 a0, 1 863; CHECK-SF2-NEXT: rts16 864; CHECK-SF2-NEXT: .LBB24_2: # %label2 865; CHECK-SF2-NEXT: movi16 a0, 0 866; CHECK-SF2-NEXT: rts16 867entry: 868 %fcmp = fcmp olt float %y, %x 869 br i1 %fcmp, label %label1, label %label2 870label1: 871 ret i32 1 872label2: 873 ret i32 0 874} 875 876define i32 @brRI_olt(float %x) { 877; 878; CHECK-SF-LABEL: brRI_olt: 879; CHECK-SF: # %bb.0: # %entry 880; CHECK-SF-NEXT: movih32 a0, 16672 881; CHECK-SF-NEXT: fmtvrl vr1, a0 882; CHECK-SF-NEXT: fcmplts vr0, vr1 883; CHECK-SF-NEXT: bf32 .LBB25_2 884; CHECK-SF-NEXT: # %bb.1: # %label1 885; CHECK-SF-NEXT: movi16 a0, 1 886; CHECK-SF-NEXT: rts16 887; CHECK-SF-NEXT: .LBB25_2: # %label2 888; CHECK-SF-NEXT: movi16 a0, 0 889; CHECK-SF-NEXT: rts16 890; 891; CHECK-SF2-LABEL: brRI_olt: 892; CHECK-SF2: # %bb.0: # %entry 893; CHECK-SF2-NEXT: movih32 a0, 16672 894; CHECK-SF2-NEXT: fmtvr.32.1 vr1, a0 895; CHECK-SF2-NEXT: fcmplt.32 vr0, vr1 896; CHECK-SF2-NEXT: bf32 .LBB25_2 897; CHECK-SF2-NEXT: # %bb.1: # %label1 898; CHECK-SF2-NEXT: movi16 a0, 1 899; CHECK-SF2-NEXT: rts16 900; CHECK-SF2-NEXT: .LBB25_2: # %label2 901; CHECK-SF2-NEXT: movi16 a0, 0 902; CHECK-SF2-NEXT: rts16 903entry: 904 %fcmp = fcmp olt float %x, 10.0 905 br i1 %fcmp, label %label1, label %label2 906label1: 907 ret i32 1 908label2: 909 ret i32 0 910} 911 912define i32 @brR0_olt(float %x) { 913; 914; CHECK-SF-LABEL: brR0_olt: 915; CHECK-SF: # %bb.0: # %entry 916; CHECK-SF-NEXT: movi16 a0, 0 917; CHECK-SF-NEXT: fmtvrl vr1, a0 918; CHECK-SF-NEXT: fcmplts vr0, vr1 919; CHECK-SF-NEXT: bf32 .LBB26_2 920; CHECK-SF-NEXT: # %bb.1: # %label1 921; CHECK-SF-NEXT: movi16 a0, 1 922; CHECK-SF-NEXT: .LBB26_2: # %label2 923; CHECK-SF-NEXT: rts16 924; 925; CHECK-SF2-LABEL: brR0_olt: 926; CHECK-SF2: # %bb.0: # %entry 927; CHECK-SF2-NEXT: movi16 a0, 0 928; CHECK-SF2-NEXT: fmtvr.32.1 vr1, a0 929; CHECK-SF2-NEXT: fcmplt.32 vr0, vr1 930; CHECK-SF2-NEXT: bf32 .LBB26_2 931; CHECK-SF2-NEXT: # %bb.1: # %label1 932; CHECK-SF2-NEXT: movi16 a0, 1 933; CHECK-SF2-NEXT: .LBB26_2: # %label2 934; CHECK-SF2-NEXT: rts16 935entry: 936 %fcmp = fcmp olt float %x, 0.0 937 br i1 %fcmp, label %label1, label %label2 938label1: 939 ret i32 1 940label2: 941 ret i32 0 942} 943 944;SLE 945define i32 @brRR_ole(float %x, float %y) { 946; 947; CHECK-SF-LABEL: brRR_ole: 948; CHECK-SF: # %bb.0: # %entry 949; CHECK-SF-NEXT: fcmphss vr0, vr1 950; CHECK-SF-NEXT: bf32 .LBB27_2 951; CHECK-SF-NEXT: # %bb.1: # %label1 952; CHECK-SF-NEXT: movi16 a0, 1 953; CHECK-SF-NEXT: rts16 954; CHECK-SF-NEXT: .LBB27_2: # %label2 955; CHECK-SF-NEXT: movi16 a0, 0 956; CHECK-SF-NEXT: rts16 957; 958; CHECK-SF2-LABEL: brRR_ole: 959; CHECK-SF2: # %bb.0: # %entry 960; CHECK-SF2-NEXT: fcmphs.32 vr0, vr1 961; CHECK-SF2-NEXT: bf32 .LBB27_2 962; CHECK-SF2-NEXT: # %bb.1: # %label1 963; CHECK-SF2-NEXT: movi16 a0, 1 964; CHECK-SF2-NEXT: rts16 965; CHECK-SF2-NEXT: .LBB27_2: # %label2 966; CHECK-SF2-NEXT: movi16 a0, 0 967; CHECK-SF2-NEXT: rts16 968entry: 969 %fcmp = fcmp ole float %y, %x 970 br i1 %fcmp, label %label1, label %label2 971label1: 972 ret i32 1 973label2: 974 ret i32 0 975} 976 977define i32 @brRI_ole(float %x) { 978; 979; CHECK-SF-LABEL: brRI_ole: 980; CHECK-SF: # %bb.0: # %entry 981; CHECK-SF-NEXT: movih32 a0, 16672 982; CHECK-SF-NEXT: fmtvrl vr1, a0 983; CHECK-SF-NEXT: fcmphss vr1, vr0 984; CHECK-SF-NEXT: bf32 .LBB28_2 985; CHECK-SF-NEXT: # %bb.1: # %label1 986; CHECK-SF-NEXT: movi16 a0, 1 987; CHECK-SF-NEXT: rts16 988; CHECK-SF-NEXT: .LBB28_2: # %label2 989; CHECK-SF-NEXT: movi16 a0, 0 990; CHECK-SF-NEXT: rts16 991; 992; CHECK-SF2-LABEL: brRI_ole: 993; CHECK-SF2: # %bb.0: # %entry 994; CHECK-SF2-NEXT: movih32 a0, 16672 995; CHECK-SF2-NEXT: fmtvr.32.1 vr1, a0 996; CHECK-SF2-NEXT: fcmphs.32 vr1, vr0 997; CHECK-SF2-NEXT: bf32 .LBB28_2 998; CHECK-SF2-NEXT: # %bb.1: # %label1 999; CHECK-SF2-NEXT: movi16 a0, 1 1000; CHECK-SF2-NEXT: rts16 1001; CHECK-SF2-NEXT: .LBB28_2: # %label2 1002; CHECK-SF2-NEXT: movi16 a0, 0 1003; CHECK-SF2-NEXT: rts16 1004entry: 1005 %fcmp = fcmp ole float %x, 10.0 1006 br i1 %fcmp, label %label1, label %label2 1007label1: 1008 ret i32 1 1009label2: 1010 ret i32 0 1011} 1012 1013define i32 @brR0_ole(float %x) { 1014; 1015; CHECK-SF-LABEL: brR0_ole: 1016; CHECK-SF: # %bb.0: # %entry 1017; CHECK-SF-NEXT: movi16 a0, 0 1018; CHECK-SF-NEXT: fmtvrl vr1, a0 1019; CHECK-SF-NEXT: fcmphss vr1, vr0 1020; CHECK-SF-NEXT: bf32 .LBB29_2 1021; CHECK-SF-NEXT: # %bb.1: # %label1 1022; CHECK-SF-NEXT: movi16 a0, 1 1023; CHECK-SF-NEXT: .LBB29_2: # %label2 1024; CHECK-SF-NEXT: rts16 1025; 1026; CHECK-SF2-LABEL: brR0_ole: 1027; CHECK-SF2: # %bb.0: # %entry 1028; CHECK-SF2-NEXT: movi16 a0, 0 1029; CHECK-SF2-NEXT: fmtvr.32.1 vr1, a0 1030; CHECK-SF2-NEXT: fcmphs.32 vr1, vr0 1031; CHECK-SF2-NEXT: bf32 .LBB29_2 1032; CHECK-SF2-NEXT: # %bb.1: # %label1 1033; CHECK-SF2-NEXT: movi16 a0, 1 1034; CHECK-SF2-NEXT: .LBB29_2: # %label2 1035; CHECK-SF2-NEXT: rts16 1036entry: 1037 %fcmp = fcmp ole float %x, 0.0 1038 br i1 %fcmp, label %label1, label %label2 1039label1: 1040 ret i32 1 1041label2: 1042 ret i32 0 1043} 1044 1045;False 1046define i32 @brRR_false(float %x, float %y) { 1047; 1048; CHECK-SF-LABEL: brRR_false: 1049; CHECK-SF: # %bb.0: # %entry 1050; CHECK-SF-NEXT: movi16 a0, 1 1051; CHECK-SF-NEXT: btsti16 a0, 0 1052; CHECK-SF-NEXT: bt32 .LBB30_2 1053; CHECK-SF-NEXT: # %bb.1: # %label1 1054; CHECK-SF-NEXT: rts16 1055; CHECK-SF-NEXT: .LBB30_2: # %label2 1056; CHECK-SF-NEXT: movi16 a0, 0 1057; CHECK-SF-NEXT: rts16 1058; 1059; CHECK-SF2-LABEL: brRR_false: 1060; CHECK-SF2: # %bb.0: # %entry 1061; CHECK-SF2-NEXT: movi16 a0, 1 1062; CHECK-SF2-NEXT: btsti16 a0, 0 1063; CHECK-SF2-NEXT: bt32 .LBB30_2 1064; CHECK-SF2-NEXT: # %bb.1: # %label1 1065; CHECK-SF2-NEXT: rts16 1066; CHECK-SF2-NEXT: .LBB30_2: # %label2 1067; CHECK-SF2-NEXT: movi16 a0, 0 1068; CHECK-SF2-NEXT: rts16 1069entry: 1070 %fcmp = fcmp false float %y, %x 1071 br i1 %fcmp, label %label1, label %label2 1072label1: 1073 ret i32 1 1074label2: 1075 ret i32 0 1076} 1077 1078define i32 @brRI_false(float %x) { 1079; 1080; CHECK-SF-LABEL: brRI_false: 1081; CHECK-SF: # %bb.0: # %entry 1082; CHECK-SF-NEXT: movi16 a0, 1 1083; CHECK-SF-NEXT: btsti16 a0, 0 1084; CHECK-SF-NEXT: bt32 .LBB31_2 1085; CHECK-SF-NEXT: # %bb.1: # %label1 1086; CHECK-SF-NEXT: rts16 1087; CHECK-SF-NEXT: .LBB31_2: # %label2 1088; CHECK-SF-NEXT: movi16 a0, 0 1089; CHECK-SF-NEXT: rts16 1090; 1091; CHECK-SF2-LABEL: brRI_false: 1092; CHECK-SF2: # %bb.0: # %entry 1093; CHECK-SF2-NEXT: movi16 a0, 1 1094; CHECK-SF2-NEXT: btsti16 a0, 0 1095; CHECK-SF2-NEXT: bt32 .LBB31_2 1096; CHECK-SF2-NEXT: # %bb.1: # %label1 1097; CHECK-SF2-NEXT: rts16 1098; CHECK-SF2-NEXT: .LBB31_2: # %label2 1099; CHECK-SF2-NEXT: movi16 a0, 0 1100; CHECK-SF2-NEXT: rts16 1101entry: 1102 %fcmp = fcmp false float %x, 10.0 1103 br i1 %fcmp, label %label1, label %label2 1104label1: 1105 ret i32 1 1106label2: 1107 ret i32 0 1108} 1109 1110define i32 @brR0_false(float %x) { 1111; 1112; CHECK-SF-LABEL: brR0_false: 1113; CHECK-SF: # %bb.0: # %entry 1114; CHECK-SF-NEXT: movi16 a0, 1 1115; CHECK-SF-NEXT: btsti16 a0, 0 1116; CHECK-SF-NEXT: bt32 .LBB32_2 1117; CHECK-SF-NEXT: # %bb.1: # %label1 1118; CHECK-SF-NEXT: rts16 1119; CHECK-SF-NEXT: .LBB32_2: # %label2 1120; CHECK-SF-NEXT: movi16 a0, 0 1121; CHECK-SF-NEXT: rts16 1122; 1123; CHECK-SF2-LABEL: brR0_false: 1124; CHECK-SF2: # %bb.0: # %entry 1125; CHECK-SF2-NEXT: movi16 a0, 1 1126; CHECK-SF2-NEXT: btsti16 a0, 0 1127; CHECK-SF2-NEXT: bt32 .LBB32_2 1128; CHECK-SF2-NEXT: # %bb.1: # %label1 1129; CHECK-SF2-NEXT: rts16 1130; CHECK-SF2-NEXT: .LBB32_2: # %label2 1131; CHECK-SF2-NEXT: movi16 a0, 0 1132; CHECK-SF2-NEXT: rts16 1133entry: 1134 %fcmp = fcmp false float %x, 0.0 1135 br i1 %fcmp, label %label1, label %label2 1136label1: 1137 ret i32 1 1138label2: 1139 ret i32 0 1140} 1141 1142 1143;ORD 1144define i32 @brRR_ord(float %x, float %y) { 1145; 1146; CHECK-SF-LABEL: brRR_ord: 1147; CHECK-SF: # %bb.0: # %entry 1148; CHECK-SF-NEXT: fcmpuos vr1, vr0 1149; CHECK-SF-NEXT: bt32 .LBB33_2 1150; CHECK-SF-NEXT: # %bb.1: # %label1 1151; CHECK-SF-NEXT: movi16 a0, 1 1152; CHECK-SF-NEXT: rts16 1153; CHECK-SF-NEXT: .LBB33_2: # %label2 1154; CHECK-SF-NEXT: movi16 a0, 0 1155; CHECK-SF-NEXT: rts16 1156; 1157; CHECK-SF2-LABEL: brRR_ord: 1158; CHECK-SF2: # %bb.0: # %entry 1159; CHECK-SF2-NEXT: fcmpuo.32 vr1, vr0 1160; CHECK-SF2-NEXT: bt32 .LBB33_2 1161; CHECK-SF2-NEXT: # %bb.1: # %label1 1162; CHECK-SF2-NEXT: movi16 a0, 1 1163; CHECK-SF2-NEXT: rts16 1164; CHECK-SF2-NEXT: .LBB33_2: # %label2 1165; CHECK-SF2-NEXT: movi16 a0, 0 1166; CHECK-SF2-NEXT: rts16 1167entry: 1168 %fcmp = fcmp ord float %y, %x 1169 br i1 %fcmp, label %label1, label %label2 1170label1: 1171 ret i32 1 1172label2: 1173 ret i32 0 1174} 1175 1176define i32 @brRI_ord(float %x) { 1177; 1178; CHECK-SF-LABEL: brRI_ord: 1179; CHECK-SF: # %bb.0: # %entry 1180; CHECK-SF-NEXT: fcmpuos vr0, vr0 1181; CHECK-SF-NEXT: bt32 .LBB34_2 1182; CHECK-SF-NEXT: # %bb.1: # %label1 1183; CHECK-SF-NEXT: movi16 a0, 1 1184; CHECK-SF-NEXT: rts16 1185; CHECK-SF-NEXT: .LBB34_2: # %label2 1186; CHECK-SF-NEXT: movi16 a0, 0 1187; CHECK-SF-NEXT: rts16 1188; 1189; CHECK-SF2-LABEL: brRI_ord: 1190; CHECK-SF2: # %bb.0: # %entry 1191; CHECK-SF2-NEXT: fcmpuo.32 vr0, vr0 1192; CHECK-SF2-NEXT: bt32 .LBB34_2 1193; CHECK-SF2-NEXT: # %bb.1: # %label1 1194; CHECK-SF2-NEXT: movi16 a0, 1 1195; CHECK-SF2-NEXT: rts16 1196; CHECK-SF2-NEXT: .LBB34_2: # %label2 1197; CHECK-SF2-NEXT: movi16 a0, 0 1198; CHECK-SF2-NEXT: rts16 1199entry: 1200 %fcmp = fcmp ord float %x, 10.0 1201 br i1 %fcmp, label %label1, label %label2 1202label1: 1203 ret i32 1 1204label2: 1205 ret i32 0 1206} 1207 1208define i32 @brR0_ord(float %x) { 1209; 1210; CHECK-SF-LABEL: brR0_ord: 1211; CHECK-SF: # %bb.0: # %entry 1212; CHECK-SF-NEXT: fcmpuos vr0, vr0 1213; CHECK-SF-NEXT: bt32 .LBB35_2 1214; CHECK-SF-NEXT: # %bb.1: # %label1 1215; CHECK-SF-NEXT: movi16 a0, 1 1216; CHECK-SF-NEXT: rts16 1217; CHECK-SF-NEXT: .LBB35_2: # %label2 1218; CHECK-SF-NEXT: movi16 a0, 0 1219; CHECK-SF-NEXT: rts16 1220; 1221; CHECK-SF2-LABEL: brR0_ord: 1222; CHECK-SF2: # %bb.0: # %entry 1223; CHECK-SF2-NEXT: fcmpuo.32 vr0, vr0 1224; CHECK-SF2-NEXT: bt32 .LBB35_2 1225; CHECK-SF2-NEXT: # %bb.1: # %label1 1226; CHECK-SF2-NEXT: movi16 a0, 1 1227; CHECK-SF2-NEXT: rts16 1228; CHECK-SF2-NEXT: .LBB35_2: # %label2 1229; CHECK-SF2-NEXT: movi16 a0, 0 1230; CHECK-SF2-NEXT: rts16 1231entry: 1232 %fcmp = fcmp ord float %x, 0.0 1233 br i1 %fcmp, label %label1, label %label2 1234label1: 1235 ret i32 1 1236label2: 1237 ret i32 0 1238} 1239 1240 1241;UEQ 1242define i32 @brRR_ueq(float %x, float %y) { 1243; 1244; CHECK-SF-LABEL: brRR_ueq: 1245; CHECK-SF: # %bb.0: # %entry 1246; CHECK-SF-NEXT: fcmpuos vr1, vr0 1247; CHECK-SF-NEXT: mvcv16 a0 1248; CHECK-SF-NEXT: fcmpnes vr1, vr0 1249; CHECK-SF-NEXT: mvc32 a1 1250; CHECK-SF-NEXT: and16 a0, a1 1251; CHECK-SF-NEXT: btsti16 a0, 0 1252; CHECK-SF-NEXT: bf32 .LBB36_2 1253; CHECK-SF-NEXT: # %bb.1: # %label2 1254; CHECK-SF-NEXT: movi16 a0, 0 1255; CHECK-SF-NEXT: rts16 1256; CHECK-SF-NEXT: .LBB36_2: # %label1 1257; CHECK-SF-NEXT: movi16 a0, 1 1258; CHECK-SF-NEXT: rts16 1259; 1260; CHECK-SF2-LABEL: brRR_ueq: 1261; CHECK-SF2: # %bb.0: # %entry 1262; CHECK-SF2-NEXT: fcmpuo.32 vr1, vr0 1263; CHECK-SF2-NEXT: mvcv16 a0 1264; CHECK-SF2-NEXT: fcmpne.32 vr1, vr0 1265; CHECK-SF2-NEXT: mvc32 a1 1266; CHECK-SF2-NEXT: and16 a0, a1 1267; CHECK-SF2-NEXT: btsti16 a0, 0 1268; CHECK-SF2-NEXT: bf32 .LBB36_2 1269; CHECK-SF2-NEXT: # %bb.1: # %label2 1270; CHECK-SF2-NEXT: movi16 a0, 0 1271; CHECK-SF2-NEXT: rts16 1272; CHECK-SF2-NEXT: .LBB36_2: # %label1 1273; CHECK-SF2-NEXT: movi16 a0, 1 1274; CHECK-SF2-NEXT: rts16 1275entry: 1276 %fcmp = fcmp ueq float %y, %x 1277 br i1 %fcmp, label %label1, label %label2 1278label1: 1279 ret i32 1 1280label2: 1281 ret i32 0 1282} 1283 1284define i32 @brRI_ueq(float %x) { 1285; 1286; CHECK-SF-LABEL: brRI_ueq: 1287; CHECK-SF: # %bb.0: # %entry 1288; CHECK-SF-NEXT: movih32 a0, 16672 1289; CHECK-SF-NEXT: fmtvrl vr1, a0 1290; CHECK-SF-NEXT: fcmpnes vr0, vr1 1291; CHECK-SF-NEXT: mvc32 a0 1292; CHECK-SF-NEXT: fcmpuos vr0, vr0 1293; CHECK-SF-NEXT: mvcv16 a1 1294; CHECK-SF-NEXT: and16 a0, a1 1295; CHECK-SF-NEXT: btsti16 a0, 0 1296; CHECK-SF-NEXT: bf32 .LBB37_2 1297; CHECK-SF-NEXT: # %bb.1: # %label2 1298; CHECK-SF-NEXT: movi16 a0, 0 1299; CHECK-SF-NEXT: rts16 1300; CHECK-SF-NEXT: .LBB37_2: # %label1 1301; CHECK-SF-NEXT: movi16 a0, 1 1302; CHECK-SF-NEXT: rts16 1303; 1304; CHECK-SF2-LABEL: brRI_ueq: 1305; CHECK-SF2: # %bb.0: # %entry 1306; CHECK-SF2-NEXT: movih32 a0, 16672 1307; CHECK-SF2-NEXT: fmtvr.32.1 vr1, a0 1308; CHECK-SF2-NEXT: fcmpne.32 vr0, vr1 1309; CHECK-SF2-NEXT: mvc32 a0 1310; CHECK-SF2-NEXT: fcmpuo.32 vr0, vr0 1311; CHECK-SF2-NEXT: mvcv16 a1 1312; CHECK-SF2-NEXT: and16 a0, a1 1313; CHECK-SF2-NEXT: btsti16 a0, 0 1314; CHECK-SF2-NEXT: bf32 .LBB37_2 1315; CHECK-SF2-NEXT: # %bb.1: # %label2 1316; CHECK-SF2-NEXT: movi16 a0, 0 1317; CHECK-SF2-NEXT: rts16 1318; CHECK-SF2-NEXT: .LBB37_2: # %label1 1319; CHECK-SF2-NEXT: movi16 a0, 1 1320; CHECK-SF2-NEXT: rts16 1321entry: 1322 %fcmp = fcmp ueq float %x, 10.0 1323 br i1 %fcmp, label %label1, label %label2 1324label1: 1325 ret i32 1 1326label2: 1327 ret i32 0 1328} 1329 1330define i32 @brR0_ueq(float %x) { 1331; 1332; CHECK-SF-LABEL: brR0_ueq: 1333; CHECK-SF: # %bb.0: # %entry 1334; CHECK-SF-NEXT: fcmpuos vr0, vr0 1335; CHECK-SF-NEXT: mvcv16 a0 1336; CHECK-SF-NEXT: fcmpznes vr0 1337; CHECK-SF-NEXT: mvc32 a1 1338; CHECK-SF-NEXT: and16 a0, a1 1339; CHECK-SF-NEXT: btsti16 a0, 0 1340; CHECK-SF-NEXT: bf32 .LBB38_2 1341; CHECK-SF-NEXT: # %bb.1: # %label2 1342; CHECK-SF-NEXT: movi16 a0, 0 1343; CHECK-SF-NEXT: rts16 1344; CHECK-SF-NEXT: .LBB38_2: # %label1 1345; CHECK-SF-NEXT: movi16 a0, 1 1346; CHECK-SF-NEXT: rts16 1347; 1348; CHECK-SF2-LABEL: brR0_ueq: 1349; CHECK-SF2: # %bb.0: # %entry 1350; CHECK-SF2-NEXT: movi16 a0, 0 1351; CHECK-SF2-NEXT: fmtvr.32.1 vr1, a0 1352; CHECK-SF2-NEXT: fcmpne.32 vr0, vr1 1353; CHECK-SF2-NEXT: mvc32 a0 1354; CHECK-SF2-NEXT: fcmpuo.32 vr0, vr0 1355; CHECK-SF2-NEXT: mvcv16 a1 1356; CHECK-SF2-NEXT: and16 a0, a1 1357; CHECK-SF2-NEXT: btsti16 a0, 0 1358; CHECK-SF2-NEXT: bf32 .LBB38_2 1359; CHECK-SF2-NEXT: # %bb.1: # %label2 1360; CHECK-SF2-NEXT: movi16 a0, 0 1361; CHECK-SF2-NEXT: rts16 1362; CHECK-SF2-NEXT: .LBB38_2: # %label1 1363; CHECK-SF2-NEXT: movi16 a0, 1 1364; CHECK-SF2-NEXT: rts16 1365entry: 1366 %fcmp = fcmp ueq float %x, 0.0 1367 br i1 %fcmp, label %label1, label %label2 1368label1: 1369 ret i32 1 1370label2: 1371 ret i32 0 1372} 1373 1374;UNE 1375define i32 @brRR_une(float %x, float %y) { 1376; 1377; CHECK-SF-LABEL: brRR_une: 1378; CHECK-SF: # %bb.0: # %entry 1379; CHECK-SF-NEXT: fcmpnes vr1, vr0 1380; CHECK-SF-NEXT: bf32 .LBB39_2 1381; CHECK-SF-NEXT: # %bb.1: # %label1 1382; CHECK-SF-NEXT: movi16 a0, 1 1383; CHECK-SF-NEXT: rts16 1384; CHECK-SF-NEXT: .LBB39_2: # %label2 1385; CHECK-SF-NEXT: movi16 a0, 0 1386; CHECK-SF-NEXT: rts16 1387; 1388; CHECK-SF2-LABEL: brRR_une: 1389; CHECK-SF2: # %bb.0: # %entry 1390; CHECK-SF2-NEXT: fcmpne.32 vr1, vr0 1391; CHECK-SF2-NEXT: bf32 .LBB39_2 1392; CHECK-SF2-NEXT: # %bb.1: # %label1 1393; CHECK-SF2-NEXT: movi16 a0, 1 1394; CHECK-SF2-NEXT: rts16 1395; CHECK-SF2-NEXT: .LBB39_2: # %label2 1396; CHECK-SF2-NEXT: movi16 a0, 0 1397; CHECK-SF2-NEXT: rts16 1398entry: 1399 %fcmp = fcmp une float %y, %x 1400 br i1 %fcmp, label %label1, label %label2 1401label1: 1402 ret i32 1 1403label2: 1404 ret i32 0 1405} 1406 1407define i32 @brRI_une(float %x) { 1408; 1409; CHECK-SF-LABEL: brRI_une: 1410; CHECK-SF: # %bb.0: # %entry 1411; CHECK-SF-NEXT: movih32 a0, 16672 1412; CHECK-SF-NEXT: fmtvrl vr1, a0 1413; CHECK-SF-NEXT: fcmpnes vr0, vr1 1414; CHECK-SF-NEXT: bf32 .LBB40_2 1415; CHECK-SF-NEXT: # %bb.1: # %label1 1416; CHECK-SF-NEXT: movi16 a0, 1 1417; CHECK-SF-NEXT: rts16 1418; CHECK-SF-NEXT: .LBB40_2: # %label2 1419; CHECK-SF-NEXT: movi16 a0, 0 1420; CHECK-SF-NEXT: rts16 1421; 1422; CHECK-SF2-LABEL: brRI_une: 1423; CHECK-SF2: # %bb.0: # %entry 1424; CHECK-SF2-NEXT: movih32 a0, 16672 1425; CHECK-SF2-NEXT: fmtvr.32.1 vr1, a0 1426; CHECK-SF2-NEXT: fcmpne.32 vr0, vr1 1427; CHECK-SF2-NEXT: bf32 .LBB40_2 1428; CHECK-SF2-NEXT: # %bb.1: # %label1 1429; CHECK-SF2-NEXT: movi16 a0, 1 1430; CHECK-SF2-NEXT: rts16 1431; CHECK-SF2-NEXT: .LBB40_2: # %label2 1432; CHECK-SF2-NEXT: movi16 a0, 0 1433; CHECK-SF2-NEXT: rts16 1434entry: 1435 %fcmp = fcmp une float %x, 10.0 1436 br i1 %fcmp, label %label1, label %label2 1437label1: 1438 ret i32 1 1439label2: 1440 ret i32 0 1441} 1442 1443define i32 @brR0_une(float %x) { 1444; 1445; CHECK-SF-LABEL: brR0_une: 1446; CHECK-SF: # %bb.0: # %entry 1447; CHECK-SF-NEXT: fcmpznes vr0 1448; CHECK-SF-NEXT: bf32 .LBB41_2 1449; CHECK-SF-NEXT: # %bb.1: # %label1 1450; CHECK-SF-NEXT: movi16 a0, 1 1451; CHECK-SF-NEXT: rts16 1452; CHECK-SF-NEXT: .LBB41_2: # %label2 1453; CHECK-SF-NEXT: movi16 a0, 0 1454; CHECK-SF-NEXT: rts16 1455; 1456; CHECK-SF2-LABEL: brR0_une: 1457; CHECK-SF2: # %bb.0: # %entry 1458; CHECK-SF2-NEXT: fcmpnez.32 vr0 1459; CHECK-SF2-NEXT: bf32 .LBB41_2 1460; CHECK-SF2-NEXT: # %bb.1: # %label1 1461; CHECK-SF2-NEXT: movi16 a0, 1 1462; CHECK-SF2-NEXT: rts16 1463; CHECK-SF2-NEXT: .LBB41_2: # %label2 1464; CHECK-SF2-NEXT: movi16 a0, 0 1465; CHECK-SF2-NEXT: rts16 1466entry: 1467 %fcmp = fcmp une float %x, 0.0 1468 br i1 %fcmp, label %label1, label %label2 1469label1: 1470 ret i32 1 1471label2: 1472 ret i32 0 1473} 1474 1475;UNO 1476define i32 @brRR_uno(float %x, float %y) { 1477; 1478; CHECK-SF-LABEL: brRR_uno: 1479; CHECK-SF: # %bb.0: # %entry 1480; CHECK-SF-NEXT: fcmpuos vr1, vr0 1481; CHECK-SF-NEXT: bt32 .LBB42_2 1482; CHECK-SF-NEXT: # %bb.1: # %label2 1483; CHECK-SF-NEXT: movi16 a0, 0 1484; CHECK-SF-NEXT: rts16 1485; CHECK-SF-NEXT: .LBB42_2: # %label1 1486; CHECK-SF-NEXT: movi16 a0, 1 1487; CHECK-SF-NEXT: rts16 1488; 1489; CHECK-SF2-LABEL: brRR_uno: 1490; CHECK-SF2: # %bb.0: # %entry 1491; CHECK-SF2-NEXT: fcmpuo.32 vr1, vr0 1492; CHECK-SF2-NEXT: bt32 .LBB42_2 1493; CHECK-SF2-NEXT: # %bb.1: # %label2 1494; CHECK-SF2-NEXT: movi16 a0, 0 1495; CHECK-SF2-NEXT: rts16 1496; CHECK-SF2-NEXT: .LBB42_2: # %label1 1497; CHECK-SF2-NEXT: movi16 a0, 1 1498; CHECK-SF2-NEXT: rts16 1499entry: 1500 %fcmp = fcmp uno float %y, %x 1501 br i1 %fcmp, label %label1, label %label2 1502label1: 1503 ret i32 1 1504label2: 1505 ret i32 0 1506} 1507 1508define i32 @brRI_uno(float %x) { 1509; 1510; CHECK-SF-LABEL: brRI_uno: 1511; CHECK-SF: # %bb.0: # %entry 1512; CHECK-SF-NEXT: fcmpuos vr0, vr0 1513; CHECK-SF-NEXT: bt32 .LBB43_2 1514; CHECK-SF-NEXT: # %bb.1: # %label2 1515; CHECK-SF-NEXT: movi16 a0, 0 1516; CHECK-SF-NEXT: rts16 1517; CHECK-SF-NEXT: .LBB43_2: # %label1 1518; CHECK-SF-NEXT: movi16 a0, 1 1519; CHECK-SF-NEXT: rts16 1520; 1521; CHECK-SF2-LABEL: brRI_uno: 1522; CHECK-SF2: # %bb.0: # %entry 1523; CHECK-SF2-NEXT: fcmpuo.32 vr0, vr0 1524; CHECK-SF2-NEXT: bt32 .LBB43_2 1525; CHECK-SF2-NEXT: # %bb.1: # %label2 1526; CHECK-SF2-NEXT: movi16 a0, 0 1527; CHECK-SF2-NEXT: rts16 1528; CHECK-SF2-NEXT: .LBB43_2: # %label1 1529; CHECK-SF2-NEXT: movi16 a0, 1 1530; CHECK-SF2-NEXT: rts16 1531entry: 1532 %fcmp = fcmp uno float %x, 10.0 1533 br i1 %fcmp, label %label1, label %label2 1534label1: 1535 ret i32 1 1536label2: 1537 ret i32 0 1538} 1539 1540define i32 @brR0_uno(float %x) { 1541; 1542; CHECK-SF-LABEL: brR0_uno: 1543; CHECK-SF: # %bb.0: # %entry 1544; CHECK-SF-NEXT: fcmpuos vr0, vr0 1545; CHECK-SF-NEXT: bt32 .LBB44_2 1546; CHECK-SF-NEXT: # %bb.1: # %label2 1547; CHECK-SF-NEXT: movi16 a0, 0 1548; CHECK-SF-NEXT: rts16 1549; CHECK-SF-NEXT: .LBB44_2: # %label1 1550; CHECK-SF-NEXT: movi16 a0, 1 1551; CHECK-SF-NEXT: rts16 1552; 1553; CHECK-SF2-LABEL: brR0_uno: 1554; CHECK-SF2: # %bb.0: # %entry 1555; CHECK-SF2-NEXT: fcmpuo.32 vr0, vr0 1556; CHECK-SF2-NEXT: bt32 .LBB44_2 1557; CHECK-SF2-NEXT: # %bb.1: # %label2 1558; CHECK-SF2-NEXT: movi16 a0, 0 1559; CHECK-SF2-NEXT: rts16 1560; CHECK-SF2-NEXT: .LBB44_2: # %label1 1561; CHECK-SF2-NEXT: movi16 a0, 1 1562; CHECK-SF2-NEXT: rts16 1563entry: 1564 %fcmp = fcmp uno float %x, 0.0 1565 br i1 %fcmp, label %label1, label %label2 1566label1: 1567 ret i32 1 1568label2: 1569 ret i32 0 1570} 1571 1572;True 1573define i32 @brRR_true(float %x, float %y) { 1574; 1575; CHECK-SF-LABEL: brRR_true: 1576; CHECK-SF: # %bb.0: # %entry 1577; CHECK-SF-NEXT: movi16 a0, 0 1578; CHECK-SF-NEXT: btsti16 a0, 0 1579; CHECK-SF-NEXT: bt32 .LBB45_2 1580; CHECK-SF-NEXT: # %bb.1: # %label1 1581; CHECK-SF-NEXT: movi16 a0, 1 1582; CHECK-SF-NEXT: .LBB45_2: # %label2 1583; CHECK-SF-NEXT: rts16 1584; 1585; CHECK-SF2-LABEL: brRR_true: 1586; CHECK-SF2: # %bb.0: # %entry 1587; CHECK-SF2-NEXT: movi16 a0, 0 1588; CHECK-SF2-NEXT: btsti16 a0, 0 1589; CHECK-SF2-NEXT: bt32 .LBB45_2 1590; CHECK-SF2-NEXT: # %bb.1: # %label1 1591; CHECK-SF2-NEXT: movi16 a0, 1 1592; CHECK-SF2-NEXT: .LBB45_2: # %label2 1593; CHECK-SF2-NEXT: rts16 1594entry: 1595 %fcmp = fcmp true float %y, %x 1596 br i1 %fcmp, label %label1, label %label2 1597label1: 1598 ret i32 1 1599label2: 1600 ret i32 0 1601} 1602 1603define i32 @brRI_true(float %x) { 1604; 1605; CHECK-SF-LABEL: brRI_true: 1606; CHECK-SF: # %bb.0: # %entry 1607; CHECK-SF-NEXT: movi16 a0, 0 1608; CHECK-SF-NEXT: btsti16 a0, 0 1609; CHECK-SF-NEXT: bt32 .LBB46_2 1610; CHECK-SF-NEXT: # %bb.1: # %label1 1611; CHECK-SF-NEXT: movi16 a0, 1 1612; CHECK-SF-NEXT: .LBB46_2: # %label2 1613; CHECK-SF-NEXT: rts16 1614; 1615; CHECK-SF2-LABEL: brRI_true: 1616; CHECK-SF2: # %bb.0: # %entry 1617; CHECK-SF2-NEXT: movi16 a0, 0 1618; CHECK-SF2-NEXT: btsti16 a0, 0 1619; CHECK-SF2-NEXT: bt32 .LBB46_2 1620; CHECK-SF2-NEXT: # %bb.1: # %label1 1621; CHECK-SF2-NEXT: movi16 a0, 1 1622; CHECK-SF2-NEXT: .LBB46_2: # %label2 1623; CHECK-SF2-NEXT: rts16 1624entry: 1625 %fcmp = fcmp true float %x, 10.0 1626 br i1 %fcmp, label %label1, label %label2 1627label1: 1628 ret i32 1 1629label2: 1630 ret i32 0 1631} 1632 1633define i32 @brR0_true(float %x) { 1634; 1635; CHECK-SF-LABEL: brR0_true: 1636; CHECK-SF: # %bb.0: # %entry 1637; CHECK-SF-NEXT: movi16 a0, 0 1638; CHECK-SF-NEXT: btsti16 a0, 0 1639; CHECK-SF-NEXT: bt32 .LBB47_2 1640; CHECK-SF-NEXT: # %bb.1: # %label1 1641; CHECK-SF-NEXT: movi16 a0, 1 1642; CHECK-SF-NEXT: .LBB47_2: # %label2 1643; CHECK-SF-NEXT: rts16 1644; 1645; CHECK-SF2-LABEL: brR0_true: 1646; CHECK-SF2: # %bb.0: # %entry 1647; CHECK-SF2-NEXT: movi16 a0, 0 1648; CHECK-SF2-NEXT: btsti16 a0, 0 1649; CHECK-SF2-NEXT: bt32 .LBB47_2 1650; CHECK-SF2-NEXT: # %bb.1: # %label1 1651; CHECK-SF2-NEXT: movi16 a0, 1 1652; CHECK-SF2-NEXT: .LBB47_2: # %label2 1653; CHECK-SF2-NEXT: rts16 1654entry: 1655 %fcmp = fcmp true float %x, 0.0 1656 br i1 %fcmp, label %label1, label %label2 1657label1: 1658 ret i32 1 1659label2: 1660 ret i32 0 1661} 1662