1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 2 2; RUN: llc -verify-machineinstrs -csky-no-aliases -mattr=+2e3 < %s -mtriple=csky | FileCheck %s 3 4define i32 @select_by_icmp_ugt(i32 %t0, i32 %t1, i32 %t2, i32 %t3) { 5; CHECK-LABEL: select_by_icmp_ugt: 6; CHECK: # %bb.0: 7; CHECK-NEXT: cmphs16 a1, a0 8; CHECK-NEXT: decf32 a3, a2, 10 9; CHECK-NEXT: mov16 a0, a3 10; CHECK-NEXT: rts16 11 %t4 = icmp ugt i32 %t0, %t1 12 %t5 = sub i32 %t2, 10 13 %t6 = select i1 %t4, i32 %t5, i32 %t3 14 ret i32 %t6 15} 16 17define i32 @select_by_icmp_sgt(i32 %t0, i32 %t1, i32 %t2, i32 %t3) { 18; CHECK-LABEL: select_by_icmp_sgt: 19; CHECK: # %bb.0: 20; CHECK-NEXT: cmplt16 a1, a0 21; CHECK-NEXT: dect32 a3, a2, 10 22; CHECK-NEXT: mov16 a0, a3 23; CHECK-NEXT: rts16 24 %t4 = icmp sgt i32 %t0, %t1 25 %t5 = sub i32 %t2, 10 26 %t6 = select i1 %t4, i32 %t5, i32 %t3 27 ret i32 %t6 28} 29 30define i32 @select_by_icmp_uge(i32 %t0, i32 %t1, i32 %t2, i32 %t3) { 31; CHECK-LABEL: select_by_icmp_uge: 32; CHECK: # %bb.0: 33; CHECK-NEXT: cmphs16 a0, a1 34; CHECK-NEXT: dect32 a3, a2, 10 35; CHECK-NEXT: mov16 a0, a3 36; CHECK-NEXT: rts16 37 %t4 = icmp uge i32 %t0, %t1 38 %t5 = sub i32 %t2, 10 39 %t6 = select i1 %t4, i32 %t5, i32 %t3 40 ret i32 %t6 41} 42 43define i32 @select_by_icmp_sge(i32 %t0, i32 %t1, i32 %t2, i32 %t3) { 44; CHECK-LABEL: select_by_icmp_sge: 45; CHECK: # %bb.0: 46; CHECK-NEXT: cmplt16 a0, a1 47; CHECK-NEXT: decf32 a3, a2, 10 48; CHECK-NEXT: mov16 a0, a3 49; CHECK-NEXT: rts16 50 %t4 = icmp sge i32 %t0, %t1 51 %t5 = sub i32 %t2, 10 52 %t6 = select i1 %t4, i32 %t5, i32 %t3 53 ret i32 %t6 54} 55 56define i32 @select_by_icmp_ult(i32 %t0, i32 %t1, i32 %t2, i32 %t3) { 57; CHECK-LABEL: select_by_icmp_ult: 58; CHECK: # %bb.0: 59; CHECK-NEXT: cmphs16 a0, a1 60; CHECK-NEXT: decf32 a3, a2, 10 61; CHECK-NEXT: mov16 a0, a3 62; CHECK-NEXT: rts16 63 %t4 = icmp ult i32 %t0, %t1 64 %t5 = sub i32 %t2, 10 65 %t6 = select i1 %t4, i32 %t5, i32 %t3 66 ret i32 %t6 67} 68 69define i32 @select_by_icmp_slt(i32 %t0, i32 %t1, i32 %t2, i32 %t3) { 70; CHECK-LABEL: select_by_icmp_slt: 71; CHECK: # %bb.0: 72; CHECK-NEXT: cmplt16 a0, a1 73; CHECK-NEXT: dect32 a3, a2, 10 74; CHECK-NEXT: mov16 a0, a3 75; CHECK-NEXT: rts16 76 %t4 = icmp slt i32 %t0, %t1 77 %t5 = sub i32 %t2, 10 78 %t6 = select i1 %t4, i32 %t5, i32 %t3 79 ret i32 %t6 80} 81 82define i32 @select_by_icmp_ule(i32 %t0, i32 %t1, i32 %t2, i32 %t3) { 83; CHECK-LABEL: select_by_icmp_ule: 84; CHECK: # %bb.0: 85; CHECK-NEXT: cmphs16 a1, a0 86; CHECK-NEXT: dect32 a3, a2, 10 87; CHECK-NEXT: mov16 a0, a3 88; CHECK-NEXT: rts16 89 %t4 = icmp ule i32 %t0, %t1 90 %t5 = sub i32 %t2, 10 91 %t6 = select i1 %t4, i32 %t5, i32 %t3 92 ret i32 %t6 93} 94 95define i32 @select_by_icmp_sle(i32 %t0, i32 %t1, i32 %t2, i32 %t3) { 96; CHECK-LABEL: select_by_icmp_sle: 97; CHECK: # %bb.0: 98; CHECK-NEXT: cmplt16 a1, a0 99; CHECK-NEXT: decf32 a3, a2, 10 100; CHECK-NEXT: mov16 a0, a3 101; CHECK-NEXT: rts16 102 %t4 = icmp sle i32 %t0, %t1 103 %t5 = sub i32 %t2, 10 104 %t6 = select i1 %t4, i32 %t5, i32 %t3 105 ret i32 %t6 106} 107 108define i32 @select_by_icmp_ne(i32 %t0, i32 %t1, i32 %t2, i32 %t3) { 109; CHECK-LABEL: select_by_icmp_ne: 110; CHECK: # %bb.0: 111; CHECK-NEXT: cmpne16 a0, a1 112; CHECK-NEXT: dect32 a3, a2, 10 113; CHECK-NEXT: mov16 a0, a3 114; CHECK-NEXT: rts16 115 %t4 = icmp ne i32 %t0, %t1 116 %t5 = sub i32 %t2, 10 117 %t6 = select i1 %t4, i32 %t5, i32 %t3 118 ret i32 %t6 119} 120 121define i32 @select_by_icmp_eq(i32 %t0, i32 %t1, i32 %t2, i32 %t3) { 122; CHECK-LABEL: select_by_icmp_eq: 123; CHECK: # %bb.0: 124; CHECK-NEXT: cmpne16 a0, a1 125; CHECK-NEXT: decf32 a3, a2, 10 126; CHECK-NEXT: mov16 a0, a3 127; CHECK-NEXT: rts16 128 %t4 = icmp eq i32 %t0, %t1 129 %t5 = sub i32 %t2, 10 130 %t6 = select i1 %t4, i32 %t5, i32 %t3 131 ret i32 %t6 132} 133 134define i32 @select_by_icmp_ugt_imm(i32 %t0, i32 %t2, i32 %t3) { 135; CHECK-LABEL: select_by_icmp_ugt_imm: 136; CHECK: # %bb.0: 137; CHECK-NEXT: movi16 a3, 128 138; CHECK-NEXT: cmphs16 a3, a0 139; CHECK-NEXT: decf32 a2, a1, 10 140; CHECK-NEXT: mov16 a0, a2 141; CHECK-NEXT: rts16 142 %t4 = icmp ugt i32 %t0, 128 143 %t5 = sub i32 %t2, 10 144 %t6 = select i1 %t4, i32 %t5, i32 %t3 145 ret i32 %t6 146} 147 148define i32 @select_by_icmp_sgt_imm(i32 %t0, i32 %t2, i32 %t3) { 149; CHECK-LABEL: select_by_icmp_sgt_imm: 150; CHECK: # %bb.0: 151; CHECK-NEXT: movi16 a3, 128 152; CHECK-NEXT: cmplt16 a3, a0 153; CHECK-NEXT: dect32 a2, a1, 10 154; CHECK-NEXT: mov16 a0, a2 155; CHECK-NEXT: rts16 156 %t4 = icmp sgt i32 %t0, 128 157 %t5 = sub i32 %t2, 10 158 %t6 = select i1 %t4, i32 %t5, i32 %t3 159 ret i32 %t6 160} 161 162define i32 @select_by_icmp_uge_imm(i32 %t0, i32 %t2, i32 %t3) { 163; CHECK-LABEL: select_by_icmp_uge_imm: 164; CHECK: # %bb.0: 165; CHECK-NEXT: movi16 a3, 127 166; CHECK-NEXT: cmphs16 a3, a0 167; CHECK-NEXT: decf32 a2, a1, 10 168; CHECK-NEXT: mov16 a0, a2 169; CHECK-NEXT: rts16 170 %t4 = icmp uge i32 %t0, 128 171 %t5 = sub i32 %t2, 10 172 %t6 = select i1 %t4, i32 %t5, i32 %t3 173 ret i32 %t6 174} 175 176define i32 @select_by_icmp_sge_imm(i32 %t0, i32 %t2, i32 %t3) { 177; CHECK-LABEL: select_by_icmp_sge_imm: 178; CHECK: # %bb.0: 179; CHECK-NEXT: movi16 a3, 127 180; CHECK-NEXT: cmplt16 a3, a0 181; CHECK-NEXT: dect32 a2, a1, 10 182; CHECK-NEXT: mov16 a0, a2 183; CHECK-NEXT: rts16 184 %t4 = icmp sge i32 %t0, 128 185 %t5 = sub i32 %t2, 10 186 %t6 = select i1 %t4, i32 %t5, i32 %t3 187 ret i32 %t6 188} 189 190define i32 @select_by_icmp_ult_imm(i32 %t0, i32 %t2, i32 %t3) { 191; CHECK-LABEL: select_by_icmp_ult_imm: 192; CHECK: # %bb.0: 193; CHECK-NEXT: cmphsi32 a0, 128 194; CHECK-NEXT: decf32 a2, a1, 10 195; CHECK-NEXT: mov16 a0, a2 196; CHECK-NEXT: rts16 197 %t4 = icmp ult i32 %t0, 128 198 %t5 = sub i32 %t2, 10 199 %t6 = select i1 %t4, i32 %t5, i32 %t3 200 ret i32 %t6 201} 202 203define i32 @select_by_icmp_slt_imm(i32 %t0, i32 %t2, i32 %t3) { 204; CHECK-LABEL: select_by_icmp_slt_imm: 205; CHECK: # %bb.0: 206; CHECK-NEXT: cmplti32 a0, 128 207; CHECK-NEXT: dect32 a2, a1, 10 208; CHECK-NEXT: mov16 a0, a2 209; CHECK-NEXT: rts16 210 %t4 = icmp slt i32 %t0, 128 211 %t5 = sub i32 %t2, 10 212 %t6 = select i1 %t4, i32 %t5, i32 %t3 213 ret i32 %t6 214} 215 216define i32 @select_by_icmp_ule_imm(i32 %t0, i32 %t2, i32 %t3) { 217; CHECK-LABEL: select_by_icmp_ule_imm: 218; CHECK: # %bb.0: 219; CHECK-NEXT: cmphsi32 a0, 129 220; CHECK-NEXT: decf32 a2, a1, 10 221; CHECK-NEXT: mov16 a0, a2 222; CHECK-NEXT: rts16 223 %t4 = icmp ule i32 %t0, 128 224 %t5 = sub i32 %t2, 10 225 %t6 = select i1 %t4, i32 %t5, i32 %t3 226 ret i32 %t6 227} 228 229define i32 @select_by_icmp_sle_imm(i32 %t0, i32 %t2, i32 %t3) { 230; CHECK-LABEL: select_by_icmp_sle_imm: 231; CHECK: # %bb.0: 232; CHECK-NEXT: cmplti32 a0, 129 233; CHECK-NEXT: dect32 a2, a1, 10 234; CHECK-NEXT: mov16 a0, a2 235; CHECK-NEXT: rts16 236 %t4 = icmp sle i32 %t0, 128 237 %t5 = sub i32 %t2, 10 238 %t6 = select i1 %t4, i32 %t5, i32 %t3 239 ret i32 %t6 240} 241 242define i32 @select_by_icmp_ne_imm(i32 %t0, i32 %t2, i32 %t3) { 243; CHECK-LABEL: select_by_icmp_ne_imm: 244; CHECK: # %bb.0: 245; CHECK-NEXT: cmpnei32 a0, 128 246; CHECK-NEXT: dect32 a2, a1, 10 247; CHECK-NEXT: mov16 a0, a2 248; CHECK-NEXT: rts16 249 %t4 = icmp ne i32 %t0, 128 250 %t5 = sub i32 %t2, 10 251 %t6 = select i1 %t4, i32 %t5, i32 %t3 252 ret i32 %t6 253} 254 255define i32 @select_by_icmp_eq_imm(i32 %t0, i32 %t2, i32 %t3) { 256; CHECK-LABEL: select_by_icmp_eq_imm: 257; CHECK: # %bb.0: 258; CHECK-NEXT: cmpnei32 a0, 128 259; CHECK-NEXT: decf32 a2, a1, 10 260; CHECK-NEXT: mov16 a0, a2 261; CHECK-NEXT: rts16 262 %t4 = icmp eq i32 %t0, 128 263 %t5 = sub i32 %t2, 10 264 %t6 = select i1 %t4, i32 %t5, i32 %t3 265 ret i32 %t6 266} 267 268define i32 @select_by_call_t(i32 %t0, i32 %t1, i32 %t2) { 269; CHECK-LABEL: select_by_call_t: 270; CHECK: # %bb.0: 271; CHECK-NEXT: subi16 sp, sp, 12 272; CHECK-NEXT: .cfi_def_cfa_offset 12 273; CHECK-NEXT: st16.w l1, (sp, 8) # 4-byte Folded Spill 274; CHECK-NEXT: st16.w l0, (sp, 4) # 4-byte Folded Spill 275; CHECK-NEXT: st32.w lr, (sp, 0) # 4-byte Folded Spill 276; CHECK-NEXT: .cfi_offset l1, -4 277; CHECK-NEXT: .cfi_offset l0, -8 278; CHECK-NEXT: .cfi_offset lr, -12 279; CHECK-NEXT: .cfi_def_cfa_offset 12 280; CHECK-NEXT: mov16 l0, a2 281; CHECK-NEXT: mov16 l1, a1 282; CHECK-NEXT: jsri32 [.LCPI20_0] 283; CHECK-NEXT: btsti16 a0, 0 284; CHECK-NEXT: dect32 l0, l1, 10 285; CHECK-NEXT: mov16 a0, l0 286; CHECK-NEXT: ld32.w lr, (sp, 0) # 4-byte Folded Reload 287; CHECK-NEXT: ld16.w l0, (sp, 4) # 4-byte Folded Reload 288; CHECK-NEXT: ld16.w l1, (sp, 8) # 4-byte Folded Reload 289; CHECK-NEXT: addi16 sp, sp, 12 290; CHECK-NEXT: rts16 291; CHECK-NEXT: .p2align 1 292; CHECK-NEXT: # %bb.1: 293; CHECK-NEXT: .p2align 2, 0x0 294; CHECK-NEXT: .LCPI20_0: 295; CHECK-NEXT: .long check_val 296 %t3 = tail call i1 @check_val(i32 %t0) 297 %t4 = sub i32 %t1, 10 298 %t5 = select i1 %t3, i32 %t4, i32 %t2 299 ret i32 %t5 300} 301 302define i32 @select_by_call_f(i32 %t0, i32 %t1, i32 %t2) { 303; CHECK-LABEL: select_by_call_f: 304; CHECK: # %bb.0: 305; CHECK-NEXT: subi16 sp, sp, 12 306; CHECK-NEXT: .cfi_def_cfa_offset 12 307; CHECK-NEXT: st16.w l1, (sp, 8) # 4-byte Folded Spill 308; CHECK-NEXT: st16.w l0, (sp, 4) # 4-byte Folded Spill 309; CHECK-NEXT: st32.w lr, (sp, 0) # 4-byte Folded Spill 310; CHECK-NEXT: .cfi_offset l1, -4 311; CHECK-NEXT: .cfi_offset l0, -8 312; CHECK-NEXT: .cfi_offset lr, -12 313; CHECK-NEXT: .cfi_def_cfa_offset 12 314; CHECK-NEXT: mov16 l0, a2 315; CHECK-NEXT: mov16 l1, a1 316; CHECK-NEXT: jsri32 [.LCPI21_0] 317; CHECK-NEXT: btsti16 a0, 0 318; CHECK-NEXT: decf32 l0, l1, 10 319; CHECK-NEXT: mov16 a0, l0 320; CHECK-NEXT: ld32.w lr, (sp, 0) # 4-byte Folded Reload 321; CHECK-NEXT: ld16.w l0, (sp, 4) # 4-byte Folded Reload 322; CHECK-NEXT: ld16.w l1, (sp, 8) # 4-byte Folded Reload 323; CHECK-NEXT: addi16 sp, sp, 12 324; CHECK-NEXT: rts16 325; CHECK-NEXT: .p2align 1 326; CHECK-NEXT: # %bb.1: 327; CHECK-NEXT: .p2align 2, 0x0 328; CHECK-NEXT: .LCPI21_0: 329; CHECK-NEXT: .long check_val 330 %t3 = tail call i1 @check_val(i32 %t0) 331 %t4 = sub i32 %t1, 10 332 %t5 = select i1 %t3, i32 %t2, i32 %t4 333 ret i32 %t5 334} 335 336declare i1 @check_val(i32) 337