xref: /llvm-project/llvm/test/CodeGen/CSKY/call.ll (revision 423ac3d9ee82ff48da91b35ec80497089bc55b9e)
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc -verify-machineinstrs -csky-no-aliases < %s -mtriple=csky -mattr=+2e3 | FileCheck %s
3; RUN: llc -verify-machineinstrs -csky-no-aliases < %s -mtriple=csky -relocation-model=pic -code-model=small -mattr=+2e3 | FileCheck %s --check-prefix=CHECK-PIC-SMALL
4; RUN: llc -verify-machineinstrs -csky-no-aliases < %s -mtriple=csky -relocation-model=pic -code-model=large -mattr=+2e3 | FileCheck %s --check-prefix=CHECK-PIC-LARGE
5
6@p_fun = global ptr @bar, align 8
7
8declare void @bar(i32, i32)
9
10define void @foo(i32 %a, ptr %ptr){
11; CHECK-LABEL: foo:
12; CHECK:       # %bb.0: # %entry
13; CHECK-NEXT:    subi16 sp, sp, 4
14; CHECK-NEXT:    .cfi_def_cfa_offset 4
15; CHECK-NEXT:    st32.w lr, (sp, 0) # 4-byte Folded Spill
16; CHECK-NEXT:    .cfi_offset lr, -4
17; CHECK-NEXT:    .cfi_def_cfa_offset 4
18; CHECK-NEXT:    ld16.w a1, (a1, 0)
19; CHECK-NEXT:    jsri32 [.LCPI0_0]
20; CHECK-NEXT:    ld32.w lr, (sp, 0) # 4-byte Folded Reload
21; CHECK-NEXT:    addi16 sp, sp, 4
22; CHECK-NEXT:    rts16
23;
24; CHECK-PIC-SMALL-LABEL: foo:
25; CHECK-PIC-SMALL:       # %bb.0: # %entry
26; CHECK-PIC-SMALL-NEXT:    subi16 sp, sp, 8
27; CHECK-PIC-SMALL-NEXT:    .cfi_def_cfa_offset 8
28; CHECK-PIC-SMALL-NEXT:    st32.w rgb, (sp, 4) # 4-byte Folded Spill
29; CHECK-PIC-SMALL-NEXT:    st32.w lr, (sp, 0) # 4-byte Folded Spill
30; CHECK-PIC-SMALL-NEXT:    .cfi_offset rgb, -4
31; CHECK-PIC-SMALL-NEXT:    .cfi_offset lr, -8
32; CHECK-PIC-SMALL-NEXT:    .cfi_def_cfa_offset 8
33; CHECK-PIC-SMALL-NEXT:    lrw32 rgb, [.LCPI0_0]
34; CHECK-PIC-SMALL-NEXT:    ld16.w a1, (a1, 0)
35; CHECK-PIC-SMALL-NEXT:    lrw32 a2, [.LCPI0_1]
36; CHECK-PIC-SMALL-NEXT:    ldr32.w a2, (rgb, a2 << 0)
37; CHECK-PIC-SMALL-NEXT:    jsr16 a2
38; CHECK-PIC-SMALL-NEXT:    ld32.w lr, (sp, 0) # 4-byte Folded Reload
39; CHECK-PIC-SMALL-NEXT:    ld32.w rgb, (sp, 4) # 4-byte Folded Reload
40; CHECK-PIC-SMALL-NEXT:    addi16 sp, sp, 8
41; CHECK-PIC-SMALL-NEXT:    rts16
42;
43; CHECK-PIC-LARGE-LABEL: foo:
44; CHECK-PIC-LARGE:       # %bb.0: # %entry
45; CHECK-PIC-LARGE-NEXT:    subi16 sp, sp, 8
46; CHECK-PIC-LARGE-NEXT:    .cfi_def_cfa_offset 8
47; CHECK-PIC-LARGE-NEXT:    st32.w rgb, (sp, 4) # 4-byte Folded Spill
48; CHECK-PIC-LARGE-NEXT:    st32.w lr, (sp, 0) # 4-byte Folded Spill
49; CHECK-PIC-LARGE-NEXT:    .cfi_offset rgb, -4
50; CHECK-PIC-LARGE-NEXT:    .cfi_offset lr, -8
51; CHECK-PIC-LARGE-NEXT:    .cfi_def_cfa_offset 8
52; CHECK-PIC-LARGE-NEXT:    lrw32 rgb, [.LCPI0_0]
53; CHECK-PIC-LARGE-NEXT:    ld16.w a1, (a1, 0)
54; CHECK-PIC-LARGE-NEXT:    lrw32 a2, [.LCPI0_1]
55; CHECK-PIC-LARGE-NEXT:    ldr32.w a2, (rgb, a2 << 0)
56; CHECK-PIC-LARGE-NEXT:    jsr16 a2
57; CHECK-PIC-LARGE-NEXT:    ld32.w lr, (sp, 0) # 4-byte Folded Reload
58; CHECK-PIC-LARGE-NEXT:    ld32.w rgb, (sp, 4) # 4-byte Folded Reload
59; CHECK-PIC-LARGE-NEXT:    addi16 sp, sp, 8
60; CHECK-PIC-LARGE-NEXT:    rts16
61; CHECK-PIC-LABEL: foo:
62; CHECK-PIC:       # %bb.0: # %entry
63; CHECK-PIC-NEXT:    ld32.w a1, a1, 0
64; CHECK-PIC-NEXT:    br32 bar
65entry:
66  %0 = load i32, ptr %ptr
67  tail call void (i32, i32) @bar(i32 %a, i32 %0)
68  ret void
69}
70
71define void @foo_indirect(i32 %a, ptr %ptr) {
72; CHECK-LABEL: foo_indirect:
73; CHECK:       # %bb.0: # %entry
74; CHECK-NEXT:    subi16 sp, sp, 4
75; CHECK-NEXT:    .cfi_def_cfa_offset 4
76; CHECK-NEXT:    st32.w lr, (sp, 0) # 4-byte Folded Spill
77; CHECK-NEXT:    .cfi_offset lr, -4
78; CHECK-NEXT:    .cfi_def_cfa_offset 4
79; CHECK-NEXT:    lrw32 a2, [.LCPI1_0]
80; CHECK-NEXT:    ld16.w a2, (a2, 0)
81; CHECK-NEXT:    ld16.w a1, (a1, 0)
82; CHECK-NEXT:    jsr16 a2
83; CHECK-NEXT:    ld32.w lr, (sp, 0) # 4-byte Folded Reload
84; CHECK-NEXT:    addi16 sp, sp, 4
85; CHECK-NEXT:    rts16
86;
87; CHECK-PIC-SMALL-LABEL: foo_indirect:
88; CHECK-PIC-SMALL:       # %bb.0: # %entry
89; CHECK-PIC-SMALL-NEXT:    subi16 sp, sp, 8
90; CHECK-PIC-SMALL-NEXT:    .cfi_def_cfa_offset 8
91; CHECK-PIC-SMALL-NEXT:    st32.w rgb, (sp, 4) # 4-byte Folded Spill
92; CHECK-PIC-SMALL-NEXT:    st32.w lr, (sp, 0) # 4-byte Folded Spill
93; CHECK-PIC-SMALL-NEXT:    .cfi_offset rgb, -4
94; CHECK-PIC-SMALL-NEXT:    .cfi_offset lr, -8
95; CHECK-PIC-SMALL-NEXT:    .cfi_def_cfa_offset 8
96; CHECK-PIC-SMALL-NEXT:    lrw32 rgb, [.LCPI1_0]
97; CHECK-PIC-SMALL-NEXT:    lrw32 a2, [.LCPI1_1]
98; CHECK-PIC-SMALL-NEXT:    ldr32.w a2, (rgb, a2 << 0)
99; CHECK-PIC-SMALL-NEXT:    ld16.w a2, (a2, 0)
100; CHECK-PIC-SMALL-NEXT:    ld16.w a1, (a1, 0)
101; CHECK-PIC-SMALL-NEXT:    jsr16 a2
102; CHECK-PIC-SMALL-NEXT:    ld32.w lr, (sp, 0) # 4-byte Folded Reload
103; CHECK-PIC-SMALL-NEXT:    ld32.w rgb, (sp, 4) # 4-byte Folded Reload
104; CHECK-PIC-SMALL-NEXT:    addi16 sp, sp, 8
105; CHECK-PIC-SMALL-NEXT:    rts16
106;
107; CHECK-PIC-LARGE-LABEL: foo_indirect:
108; CHECK-PIC-LARGE:       # %bb.0: # %entry
109; CHECK-PIC-LARGE-NEXT:    subi16 sp, sp, 8
110; CHECK-PIC-LARGE-NEXT:    .cfi_def_cfa_offset 8
111; CHECK-PIC-LARGE-NEXT:    st32.w rgb, (sp, 4) # 4-byte Folded Spill
112; CHECK-PIC-LARGE-NEXT:    st32.w lr, (sp, 0) # 4-byte Folded Spill
113; CHECK-PIC-LARGE-NEXT:    .cfi_offset rgb, -4
114; CHECK-PIC-LARGE-NEXT:    .cfi_offset lr, -8
115; CHECK-PIC-LARGE-NEXT:    .cfi_def_cfa_offset 8
116; CHECK-PIC-LARGE-NEXT:    lrw32 rgb, [.LCPI1_0]
117; CHECK-PIC-LARGE-NEXT:    lrw32 a2, [.LCPI1_1]
118; CHECK-PIC-LARGE-NEXT:    ldr32.w a2, (rgb, a2 << 0)
119; CHECK-PIC-LARGE-NEXT:    ld16.w a2, (a2, 0)
120; CHECK-PIC-LARGE-NEXT:    ld16.w a1, (a1, 0)
121; CHECK-PIC-LARGE-NEXT:    jsr16 a2
122; CHECK-PIC-LARGE-NEXT:    ld32.w lr, (sp, 0) # 4-byte Folded Reload
123; CHECK-PIC-LARGE-NEXT:    ld32.w rgb, (sp, 4) # 4-byte Folded Reload
124; CHECK-PIC-LARGE-NEXT:    addi16 sp, sp, 8
125; CHECK-PIC-LARGE-NEXT:    rts16
126; CHECK-PIC-LABEL: foo_indirect:
127; CHECK-PIC:       # %bb.0: # %entry
128; CHECK-PIC-NEXT:    movi32 a2, p_fun
129; CHECK-PIC-NEXT:    movih32 a3, p_fun
130; CHECK-PIC-NEXT:    or32 a2, a3, a2
131; CHECK-PIC-NEXT:    ld32.w a2, a2, 0
132; CHECK-PIC-NEXT:    ld32.w a1, a1, 0
133; CHECK-PIC-NEXT:    jmp32 a2
134entry:
135  %0 = load ptr, ptr @p_fun, align 8
136  %1 = load i32, ptr %ptr
137  tail call void (i32, i32) %0(i32 %a, i32 %1)
138  ret void
139}
140