xref: /llvm-project/llvm/test/CodeGen/BPF/store_imm.ll (revision c5037db4acd95790a0ca5061c8fa79c5c291607e)
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc < %s -mtriple=bpfel -mcpu=v4 -show-mc-encoding | FileCheck %s
3
4target triple = "bpf"
5
6define void @byte(ptr %p0) {
7; CHECK-LABEL: byte:
8; CHECK:       # %bb.0:
9; CHECK-NEXT:    *(u8 *)(r1 + 0) = 1 # encoding: [0x72,0x01,0x00,0x00,0x01,0x00,0x00,0x00]
10; CHECK-NEXT:    *(u8 *)(r1 + 1) = 255 # encoding: [0x72,0x01,0x01,0x00,0xff,0x00,0x00,0x00]
11  %p1 = getelementptr i8, ptr %p0, i32 1
12
13  store volatile i8  1, ptr %p0, align 1
14  store volatile i8 -1, ptr %p1, align 1
15
16  unreachable
17}
18
19define void @half(ptr, ptr %p0) {
20; CHECK-LABEL: half:
21; CHECK:       # %bb.0:
22; CHECK-NEXT:    *(u16 *)(r2 + 0) = 1 # encoding: [0x6a,0x02,0x00,0x00,0x01,0x00,0x00,0x00]
23; CHECK-NEXT:    *(u16 *)(r2 + 2) = 65535 # encoding: [0x6a,0x02,0x02,0x00,0xff,0xff,0x00,0x00]
24  %p1 = getelementptr i8, ptr %p0, i32 2
25
26  store volatile i16  1, ptr %p0, align 2
27  store volatile i16 -1, ptr %p1, align 2
28
29  unreachable
30}
31
32define void @word(ptr, ptr, ptr %p0) {
33; CHECK-LABEL: word:
34; CHECK:       # %bb.0:
35; CHECK-NEXT:    *(u32 *)(r3 + 0) = 1 # encoding: [0x62,0x03,0x00,0x00,0x01,0x00,0x00,0x00]
36; CHECK-NEXT:    *(u32 *)(r3 + 4) = -1 # encoding: [0x62,0x03,0x04,0x00,0xff,0xff,0xff,0xff]
37; CHECK-NEXT:    *(u32 *)(r3 + 8) = -2000000000 # encoding: [0x62,0x03,0x08,0x00,0x00,0x6c,0xca,0x88]
38; CHECK-NEXT:    *(u32 *)(r3 + 12) = -1 # encoding: [0x62,0x03,0x0c,0x00,0xff,0xff,0xff,0xff]
39; CHECK-NEXT:    *(u32 *)(r3 + 12) = 0 # encoding: [0x62,0x03,0x0c,0x00,0x00,0x00,0x00,0x00]
40  %p1 = getelementptr i8, ptr %p0, i32 4
41  %p2 = getelementptr i8, ptr %p0, i32 8
42  %p3 = getelementptr i8, ptr %p0, i32 12
43
44  store volatile i32           1, ptr %p0, align 4
45  store volatile i32          -1, ptr %p1, align 4
46  store volatile i32 -2000000000, ptr %p2, align 4
47  store volatile i32  4294967295, ptr %p3, align 4
48  store volatile i32  4294967296, ptr %p3, align 4
49
50  unreachable
51}
52
53define void @dword(ptr, ptr, ptr, ptr %p0) {
54; CHECK-LABEL: dword:
55; CHECK:       # %bb.0:
56; CHECK-NEXT:    *(u64 *)(r4 + 0) = 1 # encoding: [0x7a,0x04,0x00,0x00,0x01,0x00,0x00,0x00]
57; CHECK-NEXT:    *(u64 *)(r4 + 8) = -1 # encoding: [0x7a,0x04,0x08,0x00,0xff,0xff,0xff,0xff]
58; CHECK-NEXT:    *(u64 *)(r4 + 16) = 2000000000 # encoding: [0x7a,0x04,0x10,0x00,0x00,0x94,0x35,0x77]
59; CHECK-NEXT:    *(u64 *)(r4 + 16) = -2000000000 # encoding: [0x7a,0x04,0x10,0x00,0x00,0x6c,0xca,0x88]
60; CHECK-NEXT:    r1 = 4294967295 ll # encoding: [0x18,0x01,0x00,0x00,0xff,0xff,0xff,0xff,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00]
61; CHECK-NEXT:    *(u64 *)(r4 + 24) = r1 # encoding: [0x7b,0x14,0x18,0x00,0x00,0x00,0x00,0x00]
62  %p1 = getelementptr i8, ptr %p0, i32 8
63  %p2 = getelementptr i8, ptr %p0, i32 16
64  %p3 = getelementptr i8, ptr %p0, i32 24
65
66  store volatile i64           1, ptr %p0, align 8
67  store volatile i64          -1, ptr %p1, align 8
68  store volatile i64  2000000000, ptr %p2, align 8
69  store volatile i64 -2000000000, ptr %p2, align 8
70  store volatile i64  4294967295, ptr %p3, align 8
71
72  unreachable
73}
74
75define void @unaligned(ptr %p0) {
76; CHECK-LABEL: unaligned:
77; CHECK:       # %bb.0:
78; CHECK-NEXT:    *(u8 *)(r1 + 1) = 255 # encoding: [0x72,0x01,0x01,0x00,0xff,0x00,0x00,0x00]
79; CHECK-NEXT:    *(u8 *)(r1 + 0) = 254 # encoding: [0x72,0x01,0x00,0x00,0xfe,0x00,0x00,0x00]
80; CHECK-NEXT:    *(u16 *)(r1 + 10) = 65535 # encoding: [0x6a,0x01,0x0a,0x00,0xff,0xff,0x00,0x00]
81; CHECK-NEXT:    *(u16 *)(r1 + 8) = 65534 # encoding: [0x6a,0x01,0x08,0x00,0xfe,0xff,0x00,0x00]
82; CHECK-NEXT:    *(u32 *)(r1 + 20) = -1 # encoding: [0x62,0x01,0x14,0x00,0xff,0xff,0xff,0xff]
83; CHECK-NEXT:    *(u32 *)(r1 + 16) = -2 # encoding: [0x62,0x01,0x10,0x00,0xfe,0xff,0xff,0xff]
84  %p1 = getelementptr i8, ptr %p0, i32 8
85  %p2 = getelementptr i8, ptr %p0, i32 16
86
87  store volatile i16 -2, ptr %p0, align 1
88  store volatile i32 -2, ptr %p1, align 2
89  store volatile i64 -2, ptr %p2, align 4
90
91  unreachable
92}
93
94define void @inline_asm(ptr %p0) {
95; CHECK-LABEL: inline_asm:
96; CHECK:       # %bb.0:
97; CHECK-NEXT:    #APP
98; CHECK-NEXT:    *(u32 *)(r0 + 42) = 7 # encoding: [0x62,0x00,0x2a,0x00,0x07,0x00,0x00,0x00]
99; CHECK-EMPTY:
100; CHECK-NEXT:    #NO_APP
101  call void asm "*(u32 *)(r0 + 42) = 7;", "~{r0},~{mem}"()
102
103  unreachable
104}
105