1; Tests for the two-address instruction pass. 2; RUN: llc -march=arm -mcpu=cortex-a9 < %s | FileCheck %s 3 4define void @PR13378() nounwind { 5; This was orriginally a crasher trying to schedule the instructions. 6; CHECK-LABEL: PR13378: 7; CHECK: vld1.32 8; CHECK: vst1.32 9; CHECK: vst1.32 10; CHECK: vst1.32 11 12entry: 13 %0 = load <4 x float>* undef, align 4 14 store <4 x float> zeroinitializer, <4 x float>* undef, align 4 15 store <4 x float> %0, <4 x float>* undef, align 4 16 %1 = insertelement <4 x float> %0, float 1.000000e+00, i32 3 17 store <4 x float> %1, <4 x float>* undef, align 4 18 unreachable 19} 20