1# RUN: llc -mtriple=thumbv7em-unknown-unknown -mcpu=cortex-m7 \ 2# RUN: -sched-model-force-enable-intervals \ 3# RUN: %s -run-pass=machine-scheduler -o - 2>&1 -debug | FileCheck %s 4# REQUIRES: arm-registered-target, asserts 5 6# NOTE: Without the bugfix introduced in this code, the test below 7# would raise the assertion "A resource is being overwritten" from 8# `ResourceSegments::add` when enforcing the use of resource intervals 9# via -sched-model-force-enable-intervals with the scheduling model 10# for -mcpu=cortex-m7. 11 12# CHECK-LABEL: *** Final schedule for %bb.0 *** 13# CHECK: SU(0): %0:dpr = COPY $d0 14# CHECK: SU(1): %1:dpr = VABSD %0:dpr, 14, $noreg 15# CHECK: SU(2): %2:dpr = VLDRD %const.0, 0, 14, $noreg :: (load (s64) from constant-pool) 16# CHECK: SU(4): %3:rgpr = t2MOVi 0, 14, $noreg, $noreg 17# CHECK: SU(3): VCMPD %1:dpr, %2:dpr, 14, $noreg, implicit-def $fpscr_nzcv 18# CHECK: SU(5): $r0 = COPY %3:rgpr 19--- 20name: test 21tracksRegLiveness: true 22constants: 23 - id: 0 24 value: double 0x7FF0000000000000 25body: | 26 bb.0: 27 liveins: $d0 28 29 %0:dpr = COPY $d0 30 %1:dpr = VABSD %0, 14 /* CC::al */, $noreg 31 %2:dpr = VLDRD %const.0, 0, 14 /* CC::al */, $noreg :: (load (s64) from constant-pool) 32 VCMPD %1, %2, 14 /* CC::al */, $noreg, implicit-def $fpscr_nzcv 33 %4:rgpr = t2MOVi 0, 14 /* CC::al */, $noreg, $noreg 34 $r0 = COPY %4 35 tBX_RET 14 /* CC::al */, $noreg, implicit killed $r0 36 37... 38