xref: /llvm-project/llvm/test/CodeGen/ARM/machine-outliner-noreturn.mir (revision 112fba974ce42a6e552f7391d20a858a128283a1)
1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
2# RUN: llc -run-pass=machine-outliner %s -o - | FileCheck %s
3
4--- |
5  target datalayout = "e-m:e-p:32:32-Fi8-i64:64-v128:64:128-a:0:32-n32-S64"
6  target triple = "thumbv8.1m.main-arm-none-eabi"
7
8  @__stack_chk_guard = external dso_local global ptr
9
10  define hidden void @test1(i32 %P0, i32 %P1) {
11  entry:
12    ret void
13  }
14  define hidden void @test2(ptr %agg.result) { ret void }
15  define hidden void @test3(ptr %agg.result) { ret void }
16  define hidden void @test4(ptr %agg.result) { ret void }
17
18  declare void @noreturn(ptr, ptr, ptr) noreturn
19
20...
21---
22name:            test1
23tracksRegLiveness: true
24stack:
25  - { id: 1, name: '', type: spill-slot, offset: -12, size: 4, alignment: 4,
26      stack-id: default, callee-saved-register: '$lr', callee-saved-restored: true,
27      debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
28entry_values:    []
29callSites:       []
30debugValueSubstitutions: []
31constants:       []
32machineFunctionInfo:
33  isLRSpilled:     true
34body:             |
35  ; CHECK-LABEL: name: test1
36  ; CHECK: bb.0:
37  ; CHECK-NEXT:   successors: %bb.1(0x80000000)
38  ; CHECK-NEXT:   liveins: $lr, $r0, $r1, $r2, $r3, $r4
39  ; CHECK-NEXT: {{  $}}
40  ; CHECK-NEXT:   early-clobber $sp = t2STR_PRE killed $lr, $sp, -8, 14 /* CC::al */, $noreg
41  ; CHECK-NEXT:   tBL 14 /* CC::al */, $noreg, @OUTLINED_FUNCTION_0, implicit-def $lr, implicit $sp, implicit-def $lr, implicit-def $sp, implicit-def $r1, implicit $noreg, implicit $sp
42  ; CHECK-NEXT:   $lr, $sp = t2LDR_POST $sp, 8, 14 /* CC::al */, $noreg
43  ; CHECK-NEXT:   tCMPi8 killed renamable $r0, 0, 14 /* CC::al */, $noreg, implicit-def $cpsr
44  ; CHECK-NEXT:   t2STRDi8 killed $r2, killed $r3, $sp, 16, 14 /* CC::al */, $noreg
45  ; CHECK-NEXT:   INLINEASM &"", 1 /* sideeffect attdialect */, 327689 /* reguse:GPR */, killed renamable $lr
46  ; CHECK-NEXT: {{  $}}
47  ; CHECK-NEXT: bb.1:
48  ; CHECK-NEXT:   successors: %bb.2(0x80000000)
49  ; CHECK-NEXT:   liveins: $r4
50  ; CHECK-NEXT: {{  $}}
51  ; CHECK-NEXT: bb.2:
52  ; CHECK-NEXT:   tBL 14 /* CC::al */, $noreg, @noreturn, csr_aapcs, implicit-def dead $lr, implicit $sp, implicit undef $r0, implicit undef $r1, implicit undef $r2, implicit-def $sp
53  bb.0:
54    liveins: $lr, $r0, $r1, $r2, $r3, $r4
55
56    $r1 = t2MOVi16 target-flags(arm-lo16) @__stack_chk_guard, 14 /* CC::al */, $noreg
57    $r1 = t2MOVTi16 killed $r1, target-flags(arm-hi16) @__stack_chk_guard, 14 /* CC::al */, $noreg
58
59    tCMPi8 killed renamable $r0, 0, 14 /* CC::al */, $noreg, implicit-def $cpsr
60    t2STRDi8 killed $r2, killed $r3, $sp, 16, 14 /* CC::al */, $noreg
61    INLINEASM &"", 1 /* sideeffect attdialect */, 327689 /* reguse:GPR */, killed renamable $lr
62
63  bb.1:
64    liveins: $r4
65
66  bb.2:
67    tBL 14 /* CC::al */, $noreg, @noreturn, csr_aapcs, implicit-def dead $lr, implicit $sp, implicit undef $r0, implicit undef $r1, implicit undef $r2, implicit-def $sp
68
69...
70---
71name:            test2
72tracksRegLiveness: true
73body:             |
74  bb.0:
75    ; CHECK-LABEL: name: test2
76    ; CHECK: tBL 14 /* CC::al */, $noreg, @OUTLINED_FUNCTION_0, implicit-def $lr, implicit $sp, implicit-def $r1, implicit-def $lr, implicit $noreg, implicit $sp
77    $r1 = t2MOVi16 target-flags(arm-lo16) @__stack_chk_guard, 14 /* CC::al */, $noreg
78    $r1 = t2MOVTi16 killed $r1, target-flags(arm-hi16) @__stack_chk_guard, 14 /* CC::al */, $noreg
79...
80---
81name:            test3
82tracksRegLiveness: true
83body:             |
84  bb.0:
85    ; CHECK-LABEL: name: test3
86    ; CHECK: tBL 14 /* CC::al */, $noreg, @OUTLINED_FUNCTION_0, implicit-def $lr, implicit $sp, implicit-def $r1, implicit-def $lr, implicit $noreg, implicit $sp
87    $r1 = t2MOVi16 target-flags(arm-lo16) @__stack_chk_guard, 14 /* CC::al */, $noreg
88    $r1 = t2MOVTi16 killed $r1, target-flags(arm-hi16) @__stack_chk_guard, 14 /* CC::al */, $noreg
89...
90---
91name:            test4
92tracksRegLiveness: true
93body:             |
94  bb.0:
95    ; CHECK-LABEL: name: test4
96    ; CHECK: tBL 14 /* CC::al */, $noreg, @OUTLINED_FUNCTION_0, implicit-def $lr, implicit $sp, implicit-def $r1, implicit-def $lr, implicit $noreg, implicit $sp
97    $r1 = t2MOVi16 target-flags(arm-lo16) @__stack_chk_guard, 14 /* CC::al */, $noreg
98    $r1 = t2MOVTi16 killed $r1, target-flags(arm-hi16) @__stack_chk_guard, 14 /* CC::al */, $noreg
99