xref: /llvm-project/llvm/test/CodeGen/ARM/long_shift.ll (revision 359dd0c6bd7a95b2bfcbf97f80d56c7a89e700e2)
1; RUN: llc < %s -march=arm | FileCheck %s
2; XFAIL: *
3; FIXME: Fix after peephole optimizer is fixed.
4
5define i64 @f0(i64 %A, i64 %B) {
6; CHECK: f0
7; CHECK:      lsrs    r3, r3, #1
8; CHECK-NEXT: rrx     r2, r2
9; CHECK-NEXT: subs    r0, r0, r2
10; CHECK-NEXT: sbc     r1, r1, r3
11	%tmp = bitcast i64 %A to i64
12	%tmp2 = lshr i64 %B, 1
13	%tmp3 = sub i64 %tmp, %tmp2
14	ret i64 %tmp3
15}
16
17define i32 @f1(i64 %x, i64 %y) {
18; CHECK: f1
19; CHECK: lsl{{.*}}r2
20	%a = shl i64 %x, %y
21	%b = trunc i64 %a to i32
22	ret i32 %b
23}
24
25define i32 @f2(i64 %x, i64 %y) {
26; CHECK: f2
27; CHECK:      lsr{{.*}}r2
28; CHECK-NEXT: rsb     r3, r2, #32
29; CHECK-NEXT: subs    r2, r2, #32
30; CHECK-NEXT: orr     r0, r0, r1, lsl r3
31; CHECK-NEXT: movge   r0, r1, asr r2
32	%a = ashr i64 %x, %y
33	%b = trunc i64 %a to i32
34	ret i32 %b
35}
36
37define i32 @f3(i64 %x, i64 %y) {
38; CHECK: f3
39; CHECK:      lsr{{.*}}r2
40; CHECK-NEXT: rsb     r3, r2, #32
41; CHECK-NEXT: subs    r2, r2, #32
42; CHECK-NEXT: orr     r0, r0, r1, lsl r3
43; CHECK-NEXT: movge   r0, r1, lsr r2
44	%a = lshr i64 %x, %y
45	%b = trunc i64 %a to i32
46	ret i32 %b
47}
48