xref: /llvm-project/llvm/test/CodeGen/ARM/fptoi-sat-store.ll (revision e0ed0333f0fed2e73f805afd58b61176a87aa3ad) 
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc -mtriple=thumbv6-none-eabi -float-abi=soft %s -o - | FileCheck %s --check-prefixes=SOFT
3; RUN: llc -mtriple=thumbv7-none-eabi -mattr=+vfp2 %s -o - | FileCheck %s --check-prefixes=VFP,VFP2
4; RUN: llc -mtriple=thumbv8.1m.main-eabi -mattr=+fullfp16,+fp64 %s -o - | FileCheck %s --check-prefixes=VFP,FP16
5
6declare i32 @llvm.fptosi.sat.i32.f64(double)
7declare i32 @llvm.fptosi.sat.i32.f32(float)
8declare i32 @llvm.fptoui.sat.i32.f64(double)
9declare i32 @llvm.fptoui.sat.i32.f32(float)
10
11define void @test_signed_i32_f32(ptr %d, float %f) nounwind {
12; SOFT-LABEL: test_signed_i32_f32:
13; SOFT:       @ %bb.0:
14; SOFT-NEXT:    .save {r4, r5, r6, r7, lr}
15; SOFT-NEXT:    push {r4, r5, r6, r7, lr}
16; SOFT-NEXT:    .pad #4
17; SOFT-NEXT:    sub sp, #4
18; SOFT-NEXT:    mov r5, r1
19; SOFT-NEXT:    mov r4, r0
20; SOFT-NEXT:    movs r0, #207
21; SOFT-NEXT:    lsls r1, r0, #24
22; SOFT-NEXT:    mov r0, r5
23; SOFT-NEXT:    bl __aeabi_fcmpge
24; SOFT-NEXT:    mov r7, r0
25; SOFT-NEXT:    mov r0, r5
26; SOFT-NEXT:    bl __aeabi_f2iz
27; SOFT-NEXT:    cmp r7, #0
28; SOFT-NEXT:    beq .LBB0_2
29; SOFT-NEXT:  @ %bb.1:
30; SOFT-NEXT:    mov r6, r0
31; SOFT-NEXT:    b .LBB0_3
32; SOFT-NEXT:  .LBB0_2:
33; SOFT-NEXT:    movs r0, #1
34; SOFT-NEXT:    lsls r6, r0, #31
35; SOFT-NEXT:  .LBB0_3:
36; SOFT-NEXT:    ldr r1, .LCPI0_0
37; SOFT-NEXT:    mov r0, r5
38; SOFT-NEXT:    bl __aeabi_fcmpgt
39; SOFT-NEXT:    cmp r0, #0
40; SOFT-NEXT:    beq .LBB0_5
41; SOFT-NEXT:  @ %bb.4:
42; SOFT-NEXT:    ldr r6, .LCPI0_1
43; SOFT-NEXT:  .LBB0_5:
44; SOFT-NEXT:    mov r0, r5
45; SOFT-NEXT:    mov r1, r5
46; SOFT-NEXT:    bl __aeabi_fcmpun
47; SOFT-NEXT:    cmp r0, #0
48; SOFT-NEXT:    beq .LBB0_7
49; SOFT-NEXT:  @ %bb.6:
50; SOFT-NEXT:    movs r6, #0
51; SOFT-NEXT:  .LBB0_7:
52; SOFT-NEXT:    str r6, [r4]
53; SOFT-NEXT:    add sp, #4
54; SOFT-NEXT:    pop {r4, r5, r6, r7, pc}
55; SOFT-NEXT:    .p2align 2
56; SOFT-NEXT:  @ %bb.8:
57; SOFT-NEXT:  .LCPI0_0:
58; SOFT-NEXT:    .long 1325400063 @ 0x4effffff
59; SOFT-NEXT:  .LCPI0_1:
60; SOFT-NEXT:    .long 2147483647 @ 0x7fffffff
61;
62; VFP-LABEL: test_signed_i32_f32:
63; VFP:       @ %bb.0:
64; VFP-NEXT:    vmov s0, r1
65; VFP-NEXT:    vcvt.s32.f32 s0, s0
66; VFP-NEXT:    vstr s0, [r0]
67; VFP-NEXT:    bx lr
68    %r = call i32 @llvm.fptosi.sat.i32.f32(float %f)
69    store i32 %r, ptr %d, align 4
70    ret void
71}
72
73define void @test_signed_i32_f64(ptr %d, double %f) nounwind {
74; SOFT-LABEL: test_signed_i32_f64:
75; SOFT:       @ %bb.0:
76; SOFT-NEXT:    .save {r4, r5, r6, r7, lr}
77; SOFT-NEXT:    push {r4, r5, r6, r7, lr}
78; SOFT-NEXT:    .pad #4
79; SOFT-NEXT:    sub sp, #4
80; SOFT-NEXT:    mov r6, r3
81; SOFT-NEXT:    mov r7, r2
82; SOFT-NEXT:    str r0, [sp] @ 4-byte Spill
83; SOFT-NEXT:    movs r5, #0
84; SOFT-NEXT:    ldr r3, .LCPI1_0
85; SOFT-NEXT:    mov r0, r2
86; SOFT-NEXT:    mov r1, r6
87; SOFT-NEXT:    mov r2, r5
88; SOFT-NEXT:    bl __aeabi_dcmpge
89; SOFT-NEXT:    mov r4, r0
90; SOFT-NEXT:    mov r0, r7
91; SOFT-NEXT:    mov r1, r6
92; SOFT-NEXT:    bl __aeabi_d2iz
93; SOFT-NEXT:    cmp r4, #0
94; SOFT-NEXT:    beq .LBB1_2
95; SOFT-NEXT:  @ %bb.1:
96; SOFT-NEXT:    mov r4, r0
97; SOFT-NEXT:    b .LBB1_3
98; SOFT-NEXT:  .LBB1_2:
99; SOFT-NEXT:    movs r0, #1
100; SOFT-NEXT:    lsls r4, r0, #31
101; SOFT-NEXT:  .LBB1_3:
102; SOFT-NEXT:    ldr r2, .LCPI1_1
103; SOFT-NEXT:    ldr r3, .LCPI1_2
104; SOFT-NEXT:    mov r0, r7
105; SOFT-NEXT:    mov r1, r6
106; SOFT-NEXT:    bl __aeabi_dcmpgt
107; SOFT-NEXT:    cmp r0, #0
108; SOFT-NEXT:    beq .LBB1_5
109; SOFT-NEXT:  @ %bb.4:
110; SOFT-NEXT:    ldr r4, .LCPI1_3
111; SOFT-NEXT:  .LBB1_5:
112; SOFT-NEXT:    mov r0, r7
113; SOFT-NEXT:    mov r1, r6
114; SOFT-NEXT:    mov r2, r7
115; SOFT-NEXT:    mov r3, r6
116; SOFT-NEXT:    bl __aeabi_dcmpun
117; SOFT-NEXT:    cmp r0, #0
118; SOFT-NEXT:    bne .LBB1_7
119; SOFT-NEXT:  @ %bb.6:
120; SOFT-NEXT:    mov r5, r4
121; SOFT-NEXT:  .LBB1_7:
122; SOFT-NEXT:    ldr r0, [sp] @ 4-byte Reload
123; SOFT-NEXT:    str r5, [r0]
124; SOFT-NEXT:    add sp, #4
125; SOFT-NEXT:    pop {r4, r5, r6, r7, pc}
126; SOFT-NEXT:    .p2align 2
127; SOFT-NEXT:  @ %bb.8:
128; SOFT-NEXT:  .LCPI1_0:
129; SOFT-NEXT:    .long 3252682752 @ 0xc1e00000
130; SOFT-NEXT:  .LCPI1_1:
131; SOFT-NEXT:    .long 4290772992 @ 0xffc00000
132; SOFT-NEXT:  .LCPI1_2:
133; SOFT-NEXT:    .long 1105199103 @ 0x41dfffff
134; SOFT-NEXT:  .LCPI1_3:
135; SOFT-NEXT:    .long 2147483647 @ 0x7fffffff
136;
137; VFP2-LABEL: test_signed_i32_f64:
138; VFP2:       @ %bb.0:
139; VFP2-NEXT:    vmov d16, r2, r3
140; VFP2-NEXT:    vcvt.s32.f64 s0, d16
141; VFP2-NEXT:    vstr s0, [r0]
142; VFP2-NEXT:    bx lr
143;
144; FP16-LABEL: test_signed_i32_f64:
145; FP16:       @ %bb.0:
146; FP16-NEXT:    vmov d0, r2, r3
147; FP16-NEXT:    vcvt.s32.f64 s0, d0
148; FP16-NEXT:    vstr s0, [r0]
149; FP16-NEXT:    bx lr
150    %r = call i32 @llvm.fptosi.sat.i32.f64(double %f)
151    store i32 %r, ptr %d, align 4
152    ret void
153}
154
155define void @test_unsigned_i32_f32(ptr %d, float %f) nounwind {
156; SOFT-LABEL: test_unsigned_i32_f32:
157; SOFT:       @ %bb.0:
158; SOFT-NEXT:    .save {r4, r5, r6, r7, lr}
159; SOFT-NEXT:    push {r4, r5, r6, r7, lr}
160; SOFT-NEXT:    .pad #4
161; SOFT-NEXT:    sub sp, #4
162; SOFT-NEXT:    mov r6, r1
163; SOFT-NEXT:    str r0, [sp] @ 4-byte Spill
164; SOFT-NEXT:    movs r5, #0
165; SOFT-NEXT:    mov r0, r1
166; SOFT-NEXT:    mov r1, r5
167; SOFT-NEXT:    bl __aeabi_fcmpge
168; SOFT-NEXT:    mov r7, r0
169; SOFT-NEXT:    mov r0, r6
170; SOFT-NEXT:    bl __aeabi_f2uiz
171; SOFT-NEXT:    mov r4, r0
172; SOFT-NEXT:    cmp r7, #0
173; SOFT-NEXT:    bne .LBB2_2
174; SOFT-NEXT:  @ %bb.1:
175; SOFT-NEXT:    mov r4, r7
176; SOFT-NEXT:  .LBB2_2:
177; SOFT-NEXT:    ldr r1, .LCPI2_0
178; SOFT-NEXT:    mov r0, r6
179; SOFT-NEXT:    bl __aeabi_fcmpgt
180; SOFT-NEXT:    cmp r0, #0
181; SOFT-NEXT:    beq .LBB2_4
182; SOFT-NEXT:  @ %bb.3:
183; SOFT-NEXT:    mvns r4, r5
184; SOFT-NEXT:  .LBB2_4:
185; SOFT-NEXT:    ldr r0, [sp] @ 4-byte Reload
186; SOFT-NEXT:    str r4, [r0]
187; SOFT-NEXT:    add sp, #4
188; SOFT-NEXT:    pop {r4, r5, r6, r7, pc}
189; SOFT-NEXT:    .p2align 2
190; SOFT-NEXT:  @ %bb.5:
191; SOFT-NEXT:  .LCPI2_0:
192; SOFT-NEXT:    .long 1333788671 @ 0x4f7fffff
193;
194; VFP-LABEL: test_unsigned_i32_f32:
195; VFP:       @ %bb.0:
196; VFP-NEXT:    vmov s0, r1
197; VFP-NEXT:    vcvt.u32.f32 s0, s0
198; VFP-NEXT:    vstr s0, [r0]
199; VFP-NEXT:    bx lr
200    %r = call i32 @llvm.fptoui.sat.i32.f32(float %f)
201    store i32 %r, ptr %d, align 4
202    ret void
203}
204
205define void @test_unsigned_i32_f64(ptr %d, double %f) nounwind {
206; SOFT-LABEL: test_unsigned_i32_f64:
207; SOFT:       @ %bb.0:
208; SOFT-NEXT:    .save {r4, r5, r6, r7, lr}
209; SOFT-NEXT:    push {r4, r5, r6, r7, lr}
210; SOFT-NEXT:    .pad #4
211; SOFT-NEXT:    sub sp, #4
212; SOFT-NEXT:    mov r6, r3
213; SOFT-NEXT:    mov r7, r2
214; SOFT-NEXT:    str r0, [sp] @ 4-byte Spill
215; SOFT-NEXT:    movs r5, #0
216; SOFT-NEXT:    mov r0, r2
217; SOFT-NEXT:    mov r1, r3
218; SOFT-NEXT:    mov r2, r5
219; SOFT-NEXT:    mov r3, r5
220; SOFT-NEXT:    bl __aeabi_dcmpge
221; SOFT-NEXT:    mov r4, r0
222; SOFT-NEXT:    mov r0, r7
223; SOFT-NEXT:    mov r1, r6
224; SOFT-NEXT:    bl __aeabi_d2uiz
225; SOFT-NEXT:    cmp r4, #0
226; SOFT-NEXT:    bne .LBB3_2
227; SOFT-NEXT:  @ %bb.1:
228; SOFT-NEXT:    mov r0, r4
229; SOFT-NEXT:  .LBB3_2:
230; SOFT-NEXT:    mov r4, r0
231; SOFT-NEXT:    ldr r2, .LCPI3_0
232; SOFT-NEXT:    ldr r3, .LCPI3_1
233; SOFT-NEXT:    mov r0, r7
234; SOFT-NEXT:    mov r1, r6
235; SOFT-NEXT:    bl __aeabi_dcmpgt
236; SOFT-NEXT:    cmp r0, #0
237; SOFT-NEXT:    beq .LBB3_4
238; SOFT-NEXT:  @ %bb.3:
239; SOFT-NEXT:    mvns r4, r5
240; SOFT-NEXT:  .LBB3_4:
241; SOFT-NEXT:    ldr r0, [sp] @ 4-byte Reload
242; SOFT-NEXT:    str r4, [r0]
243; SOFT-NEXT:    add sp, #4
244; SOFT-NEXT:    pop {r4, r5, r6, r7, pc}
245; SOFT-NEXT:    .p2align 2
246; SOFT-NEXT:  @ %bb.5:
247; SOFT-NEXT:  .LCPI3_0:
248; SOFT-NEXT:    .long 4292870144 @ 0xffe00000
249; SOFT-NEXT:  .LCPI3_1:
250; SOFT-NEXT:    .long 1106247679 @ 0x41efffff
251;
252; VFP2-LABEL: test_unsigned_i32_f64:
253; VFP2:       @ %bb.0:
254; VFP2-NEXT:    vmov d16, r2, r3
255; VFP2-NEXT:    vcvt.u32.f64 s0, d16
256; VFP2-NEXT:    vstr s0, [r0]
257; VFP2-NEXT:    bx lr
258;
259; FP16-LABEL: test_unsigned_i32_f64:
260; FP16:       @ %bb.0:
261; FP16-NEXT:    vmov d0, r2, r3
262; FP16-NEXT:    vcvt.u32.f64 s0, d0
263; FP16-NEXT:    vstr s0, [r0]
264; FP16-NEXT:    bx lr
265    %r = call i32 @llvm.fptoui.sat.i32.f64(double %f)
266    store i32 %r, ptr %d, align 4
267    ret void
268}
269