xref: /llvm-project/llvm/test/CodeGen/ARM/cmpxchg-O0-be.ll (revision bed1c7f061aa12417aa081e334afdba45767b938)
1; RUN: llc -verify-machineinstrs -mtriple=armebv8-linux-gnueabi -O0 %s -o - | FileCheck %s
2
3@x = global i64 10, align 8
4@y = global i64 20, align 8
5@z = global i64 20, align 8
6
7; CHECK-LABEL:	main:
8; CHECK:	ldr [[R2:r[0-9]+]], [[[R1:r[0-9]+]]]
9; CHECK-NEXT:	ldr [[R1]], [[[R1]], #4]
10; CHECK:	mov [[R4:r[0-9]+]], [[R1]]
11; CHECK:	ldr [[R5:r[0-9]+]], [[[R1]]]
12; CHECK-NEXT:	ldr [[R6:r[0-9]+]], [[[R1]], #4]
13; CHECK:	mov [[R7:r[0-9]+]], [[R6]]
14
15define arm_aapcs_vfpcc i32 @main() #0 {
16entry:
17  %retval = alloca i32, align 4
18  store i32 0, ptr %retval, align 4
19  %0 = load i64, ptr @z, align 8
20  %1 = load i64, ptr @x, align 8
21  %2 = cmpxchg ptr @y, i64 %0, i64 %1 seq_cst seq_cst
22  %3 = extractvalue { i64, i1 } %2, 1
23  ret i32 0
24}
25