1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py 2# RUN: llc -O0 -mtriple thumb-- -mattr=+v6t2 -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s 3--- | 4 define void @test_and_regs() { ret void } 5 define void @test_and_imm() { ret void } 6 7 define void @test_bfc() { ret void } 8 define void @test_no_bfc_bad_mask() { ret void } 9 10 define void @test_mvn() { ret void } 11 define void @test_bic() { ret void } 12 define void @test_orn() { ret void } 13... 14--- 15name: test_and_regs 16legalized: true 17regBankSelected: true 18selected: false 19registers: 20 - { id: 0, class: gprb } 21 - { id: 1, class: gprb } 22 - { id: 2, class: gprb } 23body: | 24 bb.0: 25 liveins: $r0, $r1 26 27 ; CHECK-LABEL: name: test_and_regs 28 ; CHECK: [[COPY:%[0-9]+]]:rgpr = COPY $r0 29 ; CHECK: [[COPY1:%[0-9]+]]:rgpr = COPY $r1 30 ; CHECK: [[t2ANDrr:%[0-9]+]]:rgpr = t2ANDrr [[COPY]], [[COPY1]], 14 /* CC::al */, $noreg, $noreg 31 ; CHECK: $r0 = COPY [[t2ANDrr]] 32 ; CHECK: BX_RET 14 /* CC::al */, $noreg, implicit $r0 33 %0(s32) = COPY $r0 34 35 %1(s32) = COPY $r1 36 37 %2(s32) = G_AND %0, %1 38 39 $r0 = COPY %2(s32) 40 41 BX_RET 14, $noreg, implicit $r0 42... 43--- 44name: test_and_imm 45legalized: true 46regBankSelected: true 47selected: false 48registers: 49 - { id: 0, class: gprb } 50 - { id: 1, class: gprb } 51 - { id: 2, class: gprb } 52body: | 53 bb.0: 54 liveins: $r0 55 56 ; CHECK-LABEL: name: test_and_imm 57 ; CHECK: [[COPY:%[0-9]+]]:rgpr = COPY $r0 58 ; CHECK: [[t2ANDri:%[0-9]+]]:rgpr = t2ANDri [[COPY]], 786444, 14 /* CC::al */, $noreg, $noreg 59 ; CHECK: $r0 = COPY [[t2ANDri]] 60 ; CHECK: BX_RET 14 /* CC::al */, $noreg, implicit $r0 61 %0(s32) = COPY $r0 62 63 %1(s32) = G_CONSTANT i32 786444 ; 0x000c000c 64 %2(s32) = G_AND %0, %1 65 66 $r0 = COPY %2(s32) 67 68 BX_RET 14, $noreg, implicit $r0 69... 70--- 71name: test_bfc 72legalized: true 73regBankSelected: true 74selected: false 75registers: 76 - { id: 0, class: gprb } 77 - { id: 1, class: gprb } 78 - { id: 2, class: gprb } 79body: | 80 bb.0: 81 liveins: $r0 82 83 ; CHECK-LABEL: name: test_bfc 84 ; CHECK: [[COPY:%[0-9]+]]:rgpr = COPY $r0 85 ; CHECK: [[t2BFC:%[0-9]+]]:rgpr = t2BFC [[COPY]], -65529, 14 /* CC::al */, $noreg 86 ; CHECK: $r0 = COPY [[t2BFC]] 87 ; CHECK: BX_RET 14 /* CC::al */, $noreg, implicit $r0 88 %0(s32) = COPY $r0 89 90 %1(s32) = G_CONSTANT i32 -65529 ; 0xFFFF0007 91 %2(s32) = G_AND %0, %1 92 93 $r0 = COPY %2(s32) 94 95 BX_RET 14, $noreg, implicit $r0 96... 97--- 98name: test_no_bfc_bad_mask 99legalized: true 100regBankSelected: true 101selected: false 102registers: 103 - { id: 0, class: gprb } 104 - { id: 1, class: gprb } 105 - { id: 2, class: gprb } 106body: | 107 bb.0: 108 liveins: $r0 109 110 ; CHECK-LABEL: name: test_no_bfc_bad_mask 111 ; CHECK: [[COPY:%[0-9]+]]:rgpr = COPY $r0 112 ; CHECK: [[t2ANDri:%[0-9]+]]:rgpr = t2ANDri [[COPY]], 786444, 14 /* CC::al */, $noreg, $noreg 113 ; CHECK: $r0 = COPY [[t2ANDri]] 114 ; CHECK: BX_RET 14 /* CC::al */, $noreg, implicit $r0 115 %0(s32) = COPY $r0 116 117 %1(s32) = G_CONSTANT i32 786444 ; 0x000c000c 118 %2(s32) = G_AND %0, %1 119 120 $r0 = COPY %2(s32) 121 122 BX_RET 14, $noreg, implicit $r0 123... 124--- 125name: test_mvn 126legalized: true 127regBankSelected: true 128selected: false 129registers: 130 - { id: 0, class: gprb } 131 - { id: 1, class: gprb } 132 - { id: 2, class: gprb } 133body: | 134 bb.0: 135 liveins: $r0 136 137 ; CHECK-LABEL: name: test_mvn 138 ; CHECK: [[COPY:%[0-9]+]]:rgpr = COPY $r0 139 ; CHECK: [[t2MVNr:%[0-9]+]]:rgpr = t2MVNr [[COPY]], 14 /* CC::al */, $noreg, $noreg 140 ; CHECK: $r0 = COPY [[t2MVNr]] 141 ; CHECK: BX_RET 14 /* CC::al */, $noreg, implicit $r0 142 %0(s32) = COPY $r0 143 144 %1(s32) = G_CONSTANT i32 -1 145 %2(s32) = G_XOR %0, %1 146 147 $r0 = COPY %2(s32) 148 149 BX_RET 14, $noreg, implicit $r0 150... 151--- 152name: test_bic 153legalized: true 154regBankSelected: true 155selected: false 156registers: 157 - { id: 0, class: gprb } 158 - { id: 1, class: gprb } 159 - { id: 2, class: gprb } 160 - { id: 3, class: gprb } 161 - { id: 4, class: gprb } 162body: | 163 bb.0: 164 liveins: $r0, $r1 165 166 ; CHECK-LABEL: name: test_bic 167 ; CHECK: [[COPY:%[0-9]+]]:rgpr = COPY $r0 168 ; CHECK: [[COPY1:%[0-9]+]]:rgpr = COPY $r1 169 ; CHECK: [[t2BICrr:%[0-9]+]]:rgpr = t2BICrr [[COPY]], [[COPY1]], 14 /* CC::al */, $noreg, $noreg 170 ; CHECK: $r0 = COPY [[t2BICrr]] 171 ; CHECK: BX_RET 14 /* CC::al */, $noreg, implicit $r0 172 %0(s32) = COPY $r0 173 %1(s32) = COPY $r1 174 175 %2(s32) = G_CONSTANT i32 -1 176 %3(s32) = G_XOR %1, %2 177 178 %4(s32) = G_AND %0, %3 179 180 $r0 = COPY %4(s32) 181 182 BX_RET 14, $noreg, implicit $r0 183... 184--- 185name: test_orn 186legalized: true 187regBankSelected: true 188selected: false 189registers: 190 - { id: 0, class: gprb } 191 - { id: 1, class: gprb } 192 - { id: 2, class: gprb } 193 - { id: 3, class: gprb } 194 - { id: 4, class: gprb } 195body: | 196 bb.0: 197 liveins: $r0, $r1 198 199 ; CHECK-LABEL: name: test_orn 200 ; CHECK: [[COPY:%[0-9]+]]:rgpr = COPY $r0 201 ; CHECK: [[COPY1:%[0-9]+]]:rgpr = COPY $r1 202 ; CHECK: [[t2ORNrr:%[0-9]+]]:rgpr = t2ORNrr [[COPY]], [[COPY1]], 14 /* CC::al */, $noreg, $noreg 203 ; CHECK: $r0 = COPY [[t2ORNrr]] 204 ; CHECK: BX_RET 14 /* CC::al */, $noreg, implicit $r0 205 %0(s32) = COPY $r0 206 %1(s32) = COPY $r1 207 208 %2(s32) = G_CONSTANT i32 -1 209 %3(s32) = G_XOR %1, %2 210 211 %4(s32) = G_OR %0, %3 212 213 $r0 = COPY %4(s32) 214 215 BX_RET 14, $noreg, implicit $r0 216... 217