1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py 2# RUN: llc -O0 -mtriple thumb-- -mattr=+v6t2,+hwdiv -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s 3--- | 4 define void @test_add_regs() { ret void } 5 define void @test_add_fold_imm() { ret void } 6 define void @test_add_fold_imm12() { ret void } 7 define void @test_add_no_fold_imm() { ret void } 8 9 define void @test_sub_imm_lhs() { ret void } 10 define void @test_sub_imm_rhs() { ret void } 11 12 define void @test_mul() { ret void } 13 define void @test_mla() { ret void } 14 15 define void @test_sdiv() { ret void } 16 define void @test_udiv() { ret void } 17... 18--- 19name: test_add_regs 20legalized: true 21regBankSelected: true 22selected: false 23registers: 24 - { id: 0, class: gprb } 25 - { id: 1, class: gprb } 26 - { id: 2, class: gprb } 27body: | 28 bb.0: 29 liveins: $r0, $r1 30 31 ; CHECK-LABEL: name: test_add_regs 32 ; CHECK: [[COPY:%[0-9]+]]:gprnopc = COPY $r0 33 ; CHECK: [[COPY1:%[0-9]+]]:rgpr = COPY $r1 34 ; CHECK: [[t2ADDrr:%[0-9]+]]:gprnopc = t2ADDrr [[COPY]], [[COPY1]], 14 /* CC::al */, $noreg, $noreg 35 ; CHECK: $r0 = COPY [[t2ADDrr]] 36 ; CHECK: BX_RET 14 /* CC::al */, $noreg, implicit $r0 37 %0(s32) = COPY $r0 38 39 %1(s32) = COPY $r1 40 41 %2(s32) = G_ADD %0, %1 42 43 $r0 = COPY %2(s32) 44 45 BX_RET 14, $noreg, implicit $r0 46... 47--- 48name: test_add_fold_imm 49legalized: true 50regBankSelected: true 51selected: false 52registers: 53 - { id: 0, class: gprb } 54 - { id: 1, class: gprb } 55 - { id: 2, class: gprb } 56body: | 57 bb.0: 58 liveins: $r0 59 60 ; CHECK-LABEL: name: test_add_fold_imm 61 ; CHECK: [[COPY:%[0-9]+]]:gprnopc = COPY $r0 62 ; CHECK: [[t2ADDri:%[0-9]+]]:rgpr = t2ADDri [[COPY]], 786444, 14 /* CC::al */, $noreg, $noreg 63 ; CHECK: $r0 = COPY [[t2ADDri]] 64 ; CHECK: BX_RET 14 /* CC::al */, $noreg, implicit $r0 65 %0(s32) = COPY $r0 66 67 %1(s32) = G_CONSTANT i32 786444 ; 0x000c000c 68 %2(s32) = G_ADD %0, %1 69 70 $r0 = COPY %2(s32) 71 72 BX_RET 14, $noreg, implicit $r0 73... 74--- 75name: test_add_fold_imm12 76legalized: true 77regBankSelected: true 78selected: false 79registers: 80 - { id: 0, class: gprb } 81 - { id: 1, class: gprb } 82 - { id: 2, class: gprb } 83body: | 84 bb.0: 85 liveins: $r0 86 87 ; CHECK-LABEL: name: test_add_fold_imm12 88 ; CHECK: [[COPY:%[0-9]+]]:gpr = COPY $r0 89 ; CHECK: [[t2ADDri12_:%[0-9]+]]:rgpr = t2ADDri12 [[COPY]], 4093, 14 /* CC::al */, $noreg 90 ; CHECK: $r0 = COPY [[t2ADDri12_]] 91 ; CHECK: BX_RET 14 /* CC::al */, $noreg, implicit $r0 92 %0(s32) = COPY $r0 93 94 %1(s32) = G_CONSTANT i32 4093 95 %2(s32) = G_ADD %0, %1 96 97 $r0 = COPY %2(s32) 98 99 BX_RET 14, $noreg, implicit $r0 100... 101--- 102name: test_add_no_fold_imm 103legalized: true 104regBankSelected: true 105selected: false 106registers: 107 - { id: 0, class: gprb } 108 - { id: 1, class: gprb } 109 - { id: 2, class: gprb } 110body: | 111 bb.0: 112 liveins: $r0 113 114 ; CHECK-LABEL: name: test_add_no_fold_imm 115 ; CHECK: [[COPY:%[0-9]+]]:gprnopc = COPY $r0 116 ; CHECK: [[t2MOVi32imm:%[0-9]+]]:rgpr = t2MOVi32imm 185470479 117 ; CHECK: [[t2ADDrr:%[0-9]+]]:gprnopc = t2ADDrr [[COPY]], [[t2MOVi32imm]], 14 /* CC::al */, $noreg, $noreg 118 ; CHECK: $r0 = COPY [[t2ADDrr]] 119 ; CHECK: BX_RET 14 /* CC::al */, $noreg, implicit $r0 120 %0(s32) = COPY $r0 121 122 %1(s32) = G_CONSTANT i32 185470479 ; 0x0b0e0e0f 123 124 %2(s32) = G_ADD %0, %1 125 126 $r0 = COPY %2(s32) 127 128 BX_RET 14, $noreg, implicit $r0 129... 130--- 131name: test_sub_imm_lhs 132legalized: true 133regBankSelected: true 134selected: false 135registers: 136 - { id: 0, class: gprb } 137 - { id: 1, class: gprb } 138 - { id: 2, class: gprb } 139body: | 140 bb.0: 141 liveins: $r0 142 143 ; CHECK-LABEL: name: test_sub_imm_lhs 144 ; CHECK: [[COPY:%[0-9]+]]:rgpr = COPY $r0 145 ; CHECK: [[t2RSBri:%[0-9]+]]:rgpr = t2RSBri [[COPY]], 786444, 14 /* CC::al */, $noreg, $noreg 146 ; CHECK: $r0 = COPY [[t2RSBri]] 147 ; CHECK: BX_RET 14 /* CC::al */, $noreg, implicit $r0 148 %0(s32) = COPY $r0 149 150 %1(s32) = G_CONSTANT i32 786444 ; 0x000c000c 151 %2(s32) = G_SUB %1, %0 152 153 $r0 = COPY %2(s32) 154 155 BX_RET 14, $noreg, implicit $r0 156... 157--- 158name: test_sub_imm_rhs 159legalized: true 160regBankSelected: true 161selected: false 162registers: 163 - { id: 0, class: gprb } 164 - { id: 1, class: gprb } 165 - { id: 2, class: gprb } 166body: | 167 bb.0: 168 liveins: $r0 169 170 ; CHECK-LABEL: name: test_sub_imm_rhs 171 ; CHECK: [[COPY:%[0-9]+]]:gprnopc = COPY $r0 172 ; CHECK: [[t2SUBri:%[0-9]+]]:rgpr = t2SUBri [[COPY]], 786444, 14 /* CC::al */, $noreg, $noreg 173 ; CHECK: $r0 = COPY [[t2SUBri]] 174 ; CHECK: BX_RET 14 /* CC::al */, $noreg, implicit $r0 175 %0(s32) = COPY $r0 176 177 %1(s32) = G_CONSTANT i32 786444 ; 0x000c000c 178 %2(s32) = G_SUB %0, %1 179 180 $r0 = COPY %2(s32) 181 182 BX_RET 14, $noreg, implicit $r0 183... 184--- 185name: test_mul 186legalized: true 187regBankSelected: true 188selected: false 189registers: 190 - { id: 0, class: gprb } 191 - { id: 1, class: gprb } 192 - { id: 2, class: gprb } 193body: | 194 bb.0: 195 liveins: $r0, $r1 196 197 ; CHECK-LABEL: name: test_mul 198 ; CHECK: [[COPY:%[0-9]+]]:rgpr = COPY $r0 199 ; CHECK: [[COPY1:%[0-9]+]]:rgpr = COPY $r1 200 ; CHECK: [[t2MUL:%[0-9]+]]:rgpr = t2MUL [[COPY]], [[COPY1]], 14 /* CC::al */, $noreg 201 ; CHECK: $r0 = COPY [[t2MUL]] 202 ; CHECK: BX_RET 14 /* CC::al */, $noreg, implicit $r0 203 %0(s32) = COPY $r0 204 205 %1(s32) = COPY $r1 206 207 %2(s32) = G_MUL %0, %1 208 209 $r0 = COPY %2(s32) 210 211 BX_RET 14, $noreg, implicit $r0 212... 213--- 214name: test_mla 215legalized: true 216regBankSelected: true 217selected: false 218registers: 219 - { id: 0, class: gprb } 220 - { id: 1, class: gprb } 221 - { id: 2, class: gprb } 222 - { id: 3, class: gprb } 223 - { id: 4, class: gprb } 224body: | 225 bb.0: 226 liveins: $r0, $r1, $r2 227 228 ; CHECK-LABEL: name: test_mla 229 ; CHECK: [[COPY:%[0-9]+]]:rgpr = COPY $r0 230 ; CHECK: [[COPY1:%[0-9]+]]:rgpr = COPY $r1 231 ; CHECK: [[COPY2:%[0-9]+]]:rgpr = COPY $r2 232 ; CHECK: [[t2MLA:%[0-9]+]]:rgpr = t2MLA [[COPY]], [[COPY1]], [[COPY2]], 14 /* CC::al */, $noreg 233 ; CHECK: $r0 = COPY [[t2MLA]] 234 ; CHECK: BX_RET 14 /* CC::al */, $noreg, implicit $r0 235 %0(s32) = COPY $r0 236 237 %1(s32) = COPY $r1 238 239 %2(s32) = COPY $r2 240 241 %3(s32) = G_MUL %0, %1 242 %4(s32) = G_ADD %3, %2 243 244 $r0 = COPY %4(s32) 245 246 BX_RET 14, $noreg, implicit $r0 247... 248--- 249name: test_sdiv 250legalized: true 251regBankSelected: true 252selected: false 253registers: 254 - { id: 0, class: gprb } 255 - { id: 1, class: gprb } 256 - { id: 2, class: gprb } 257body: | 258 bb.0: 259 liveins: $r0, $r1 260 261 ; CHECK-LABEL: name: test_sdiv 262 ; CHECK: [[COPY:%[0-9]+]]:rgpr = COPY $r0 263 ; CHECK: [[COPY1:%[0-9]+]]:rgpr = COPY $r1 264 ; CHECK: [[t2SDIV:%[0-9]+]]:rgpr = t2SDIV [[COPY]], [[COPY1]], 14 /* CC::al */, $noreg 265 ; CHECK: $r0 = COPY [[t2SDIV]] 266 ; CHECK: BX_RET 14 /* CC::al */, $noreg, implicit $r0 267 %0(s32) = COPY $r0 268 269 %1(s32) = COPY $r1 270 271 %2(s32) = G_SDIV %0, %1 272 273 $r0 = COPY %2(s32) 274 275 BX_RET 14, $noreg, implicit $r0 276... 277--- 278name: test_udiv 279legalized: true 280regBankSelected: true 281selected: false 282registers: 283 - { id: 0, class: gprb } 284 - { id: 1, class: gprb } 285 - { id: 2, class: gprb } 286body: | 287 bb.0: 288 liveins: $r0, $r1 289 290 ; CHECK-LABEL: name: test_udiv 291 ; CHECK: [[COPY:%[0-9]+]]:rgpr = COPY $r0 292 ; CHECK: [[COPY1:%[0-9]+]]:rgpr = COPY $r1 293 ; CHECK: [[t2UDIV:%[0-9]+]]:rgpr = t2UDIV [[COPY]], [[COPY1]], 14 /* CC::al */, $noreg 294 ; CHECK: $r0 = COPY [[t2UDIV]] 295 ; CHECK: BX_RET 14 /* CC::al */, $noreg, implicit $r0 296 %0(s32) = COPY $r0 297 298 %1(s32) = COPY $r1 299 300 %2(s32) = G_UDIV %0, %1 301 302 $r0 = COPY %2(s32) 303 304 BX_RET 14, $noreg, implicit $r0 305... 306