xref: /llvm-project/llvm/test/CodeGen/ARM/GlobalISel/select-pkhbt.mir (revision 7efabe5c7de46fe190638741c6ee81ae13255e38)
1# RUN: llc -O0 -mtriple arm-- -mattr=+v6 -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s --check-prefixes=CHECK,ARM
2# RUN: llc -O0 -mtriple thumb-- -mattr=+v6t2,+dsp -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s --check-prefixes=CHECK,THUMB
3--- |
4  define void @test_pkhbt() { ret void }
5  define void @test_pkhbt_commutative() { ret void }
6  define void @test_pkhbt_imm16_31() { ret void }
7  define void @test_pkhbt_unshifted() { ret void }
8
9  define void @test_pkhtb_imm16() { ret void }
10  define void @test_pkhtb_imm1_15() { ret void }
11...
12---
13name:            test_pkhbt
14# CHECK-LABEL: name: test_pkhbt
15legalized:       true
16regBankSelected: true
17selected:        false
18# CHECK: selected: true
19registers:
20  - { id: 0, class: gprb }
21  - { id: 1, class: gprb }
22  - { id: 2, class: gprb }
23  - { id: 3, class: gprb }
24  - { id: 4, class: gprb }
25  - { id: 5, class: gprb }
26  - { id: 6, class: gprb }
27  - { id: 7, class: gprb }
28  - { id: 8, class: gprb }
29body:             |
30  bb.0:
31    liveins: $r0, $r1
32
33    %0(s32) = COPY $r0
34    %1(s32) = COPY $r1
35    ; ARM-DAG: [[VREGX:%[0-9]+]]:gprnopc = COPY $r0
36    ; ARM-DAG: [[VREGY:%[0-9]+]]:gprnopc = COPY $r1
37    ; THUMB-DAG: [[VREGX:%[0-9]+]]:rgpr = COPY $r0
38    ; THUMB-DAG: [[VREGY:%[0-9]+]]:rgpr = COPY $r1
39
40    %2(s32) = G_CONSTANT i32 65535 ; 0xFFFF
41    %3(s32) = G_AND %0, %2
42
43    %4(s32) = G_CONSTANT i32 7
44    %5(s32) = G_SHL %1, %4
45    %6(s32) = G_CONSTANT i32 4294901760 ; 0xFFFF0000
46    %7(s32) = G_AND %5, %6
47
48    %8(s32) = G_OR %3, %7
49    ; ARM: [[VREGR:%[0-9]+]]:gprnopc = PKHBT [[VREGX]], [[VREGY]], 7, 14 /* CC::al */, $noreg
50    ; THUMB: [[VREGR:%[0-9]+]]:rgpr = t2PKHBT [[VREGX]], [[VREGY]], 7, 14 /* CC::al */, $noreg
51
52    $r0 = COPY %8(s32)
53    ; CHECK: $r0 = COPY [[VREGR]]
54
55    BX_RET 14, $noreg, implicit $r0
56    ; CHECK: BX_RET 14 /* CC::al */, $noreg, implicit $r0
57...
58---
59name:            test_pkhbt_commutative
60# CHECK-LABEL: name: test_pkhbt_commutative
61legalized:       true
62regBankSelected: true
63selected:        false
64# CHECK: selected: true
65registers:
66  - { id: 0, class: gprb }
67  - { id: 1, class: gprb }
68  - { id: 2, class: gprb }
69  - { id: 3, class: gprb }
70  - { id: 4, class: gprb }
71  - { id: 5, class: gprb }
72  - { id: 6, class: gprb }
73  - { id: 7, class: gprb }
74  - { id: 8, class: gprb }
75body:             |
76  bb.0:
77    liveins: $r0, $r1
78
79    %0(s32) = COPY $r0
80    %1(s32) = COPY $r1
81    ; ARM-DAG: [[VREGX:%[0-9]+]]:gprnopc = COPY $r0
82    ; ARM-DAG: [[VREGY:%[0-9]+]]:gprnopc = COPY $r1
83    ; THUMB-DAG: [[VREGX:%[0-9]+]]:rgpr = COPY $r0
84    ; THUMB-DAG: [[VREGY:%[0-9]+]]:rgpr = COPY $r1
85
86    %2(s32) = G_CONSTANT i32 65535 ; 0xFFFF
87    %3(s32) = G_AND %0, %2
88
89    %4(s32) = G_CONSTANT i32 7
90    %5(s32) = G_SHL %1, %4
91    %6(s32) = G_CONSTANT i32 4294901760 ; 0xFFFF0000
92    %7(s32) = G_AND %5, %6
93
94    %8(s32) = G_OR %7, %3
95    ; ARM: [[VREGR:%[0-9]+]]:gprnopc = PKHBT [[VREGX]], [[VREGY]], 7, 14 /* CC::al */, $noreg
96    ; THUMB: [[VREGR:%[0-9]+]]:rgpr = t2PKHBT [[VREGX]], [[VREGY]], 7, 14 /* CC::al */, $noreg
97
98    $r0 = COPY %8(s32)
99    ; CHECK: $r0 = COPY [[VREGR]]
100
101    BX_RET 14, $noreg, implicit $r0
102    ; CHECK: BX_RET 14 /* CC::al */, $noreg, implicit $r0
103...
104---
105name:            test_pkhbt_imm16_31
106# CHECK-LABEL: name: test_pkhbt_imm16_31
107legalized:       true
108regBankSelected: true
109selected:        false
110# CHECK: selected: true
111registers:
112  - { id: 0, class: gprb }
113  - { id: 1, class: gprb }
114  - { id: 2, class: gprb }
115  - { id: 3, class: gprb }
116  - { id: 4, class: gprb }
117  - { id: 5, class: gprb }
118  - { id: 6, class: gprb }
119body:             |
120  bb.0:
121    liveins: $r0, $r1
122
123    %0(s32) = COPY $r0
124    %1(s32) = COPY $r1
125    ; ARM-DAG: [[VREGX:%[0-9]+]]:gprnopc = COPY $r0
126    ; ARM-DAG: [[VREGY:%[0-9]+]]:gprnopc = COPY $r1
127    ; THUMB-DAG: [[VREGX:%[0-9]+]]:rgpr = COPY $r0
128    ; THUMB-DAG: [[VREGY:%[0-9]+]]:rgpr = COPY $r1
129
130    %2(s32) = G_CONSTANT i32 65535 ; 0xFFFF
131    %3(s32) = G_AND %0, %2
132
133    %4(s32) = G_CONSTANT i32 17
134    %5(s32) = G_SHL %1, %4
135
136    %6(s32) = G_OR %3, %5
137    ; ARM: [[VREGR:%[0-9]+]]:gprnopc = PKHBT [[VREGX]], [[VREGY]], 17, 14 /* CC::al */, $noreg
138    ; THUMB: [[VREGR:%[0-9]+]]:rgpr = t2PKHBT [[VREGX]], [[VREGY]], 17, 14 /* CC::al */, $noreg
139
140    $r0 = COPY %6(s32)
141    ; CHECK: $r0 = COPY [[VREGR]]
142
143    BX_RET 14, $noreg, implicit $r0
144    ; CHECK: BX_RET 14 /* CC::al */, $noreg, implicit $r0
145...
146---
147name:            test_pkhbt_unshifted
148# CHECK-LABEL: name: test_pkhbt_unshifted
149legalized:       true
150regBankSelected: true
151selected:        false
152# CHECK: selected: true
153registers:
154  - { id: 0, class: gprb }
155  - { id: 1, class: gprb }
156  - { id: 2, class: gprb }
157  - { id: 3, class: gprb }
158  - { id: 4, class: gprb }
159  - { id: 5, class: gprb }
160  - { id: 6, class: gprb }
161body:             |
162  bb.0:
163    liveins: $r0, $r1
164
165    %0(s32) = COPY $r0
166    %1(s32) = COPY $r1
167    ; ARM-DAG: [[VREGX:%[0-9]+]]:gprnopc = COPY $r0
168    ; ARM-DAG: [[VREGY:%[0-9]+]]:gprnopc = COPY $r1
169    ; THUMB-DAG: [[VREGX:%[0-9]+]]:rgpr = COPY $r0
170    ; THUMB-DAG: [[VREGY:%[0-9]+]]:rgpr = COPY $r1
171
172    %2(s32) = G_CONSTANT i32 65535 ; 0xFFFF
173    %3(s32) = G_AND %0, %2
174
175    %4(s32) = G_CONSTANT i32 4294901760 ; 0xFFFF0000
176    %5(s32) = G_AND %1, %4
177
178    %6(s32) = G_OR %3, %5
179    ; ARM: [[VREGR:%[0-9]+]]:gprnopc = PKHBT [[VREGX]], [[VREGY]], 0, 14 /* CC::al */, $noreg
180    ; THUMB: [[VREGR:%[0-9]+]]:rgpr = t2PKHBT [[VREGX]], [[VREGY]], 0, 14 /* CC::al */, $noreg
181
182    $r0 = COPY %6(s32)
183    ; CHECK: $r0 = COPY [[VREGR]]
184
185    BX_RET 14, $noreg, implicit $r0
186    ; CHECK: BX_RET 14 /* CC::al */, $noreg, implicit $r0
187...
188---
189name:            test_pkhtb_imm16
190# CHECK-LABEL: name: test_pkhtb_imm16
191legalized:       true
192regBankSelected: true
193selected:        false
194# CHECK: selected: true
195registers:
196  - { id: 0, class: gprb }
197  - { id: 1, class: gprb }
198  - { id: 2, class: gprb }
199  - { id: 3, class: gprb }
200  - { id: 4, class: gprb }
201  - { id: 5, class: gprb }
202  - { id: 6, class: gprb }
203body:             |
204  bb.0:
205    liveins: $r0, $r1
206
207    %0(s32) = COPY $r0
208    %1(s32) = COPY $r1
209    ; ARM-DAG: [[VREGX:%[0-9]+]]:gprnopc = COPY $r0
210    ; ARM-DAG: [[VREGY:%[0-9]+]]:gprnopc = COPY $r1
211    ; THUMB-DAG: [[VREGX:%[0-9]+]]:rgpr = COPY $r0
212    ; THUMB-DAG: [[VREGY:%[0-9]+]]:rgpr = COPY $r1
213
214    %2(s32) = G_CONSTANT i32 4294901760 ; 0xFFFF0000
215    %3(s32) = G_AND %0, %2
216
217    %4(s32) = G_CONSTANT i32 16
218    %5(s32) = G_LSHR %1, %4
219
220    %6(s32) = G_OR %3, %5
221    ; ARM: [[VREGR:%[0-9]+]]:gprnopc = PKHTB [[VREGX]], [[VREGY]], 16, 14 /* CC::al */, $noreg
222    ; THUMB: [[VREGR:%[0-9]+]]:rgpr = t2PKHTB [[VREGX]], [[VREGY]], 16, 14 /* CC::al */, $noreg
223
224    $r0 = COPY %6(s32)
225    ; CHECK: $r0 = COPY [[VREGR]]
226
227    BX_RET 14, $noreg, implicit $r0
228    ; CHECK: BX_RET 14 /* CC::al */, $noreg, implicit $r0
229...
230---
231name:            test_pkhtb_imm1_15
232# CHECK-LABEL: name: test_pkhtb_imm1_15
233legalized:       true
234regBankSelected: true
235selected:        false
236# CHECK: selected: true
237registers:
238  - { id: 0, class: gprb }
239  - { id: 1, class: gprb }
240  - { id: 2, class: gprb }
241  - { id: 3, class: gprb }
242  - { id: 4, class: gprb }
243  - { id: 5, class: gprb }
244  - { id: 6, class: gprb }
245  - { id: 7, class: gprb }
246  - { id: 8, class: gprb }
247body:             |
248  bb.0:
249    liveins: $r0, $r1
250
251    %0(s32) = COPY $r0
252    %1(s32) = COPY $r1
253    ; ARM-DAG: [[VREGX:%[0-9]+]]:gprnopc = COPY $r0
254    ; ARM-DAG: [[VREGY:%[0-9]+]]:gprnopc = COPY $r1
255    ; THUMB-DAG: [[VREGX:%[0-9]+]]:rgpr = COPY $r0
256    ; THUMB-DAG: [[VREGY:%[0-9]+]]:rgpr = COPY $r1
257
258    %2(s32) = G_CONSTANT i32 4294901760 ; 0xFFFF0000
259    %3(s32) = G_AND %0, %2
260
261    %4(s32) = G_CONSTANT i32 7
262    %5(s32) = G_LSHR %1, %4
263    %6(s32) = G_CONSTANT i32 65535 ; 0xFFFF
264    %7(s32) = G_AND %5, %6
265
266    %8(s32) = G_OR %3, %7
267    ; ARM: [[VREGR:%[0-9]+]]:gprnopc = PKHTB [[VREGX]], [[VREGY]], 7, 14 /* CC::al */, $noreg
268    ; THUMB: [[VREGR:%[0-9]+]]:rgpr = t2PKHTB [[VREGX]], [[VREGY]], 7, 14 /* CC::al */, $noreg
269
270    $r0 = COPY %8(s32)
271    ; CHECK: $r0 = COPY [[VREGR]]
272
273    BX_RET 14, $noreg, implicit $r0
274    ; CHECK: BX_RET 14 /* CC::al */, $noreg, implicit $r0
275...
276