xref: /llvm-project/llvm/test/CodeGen/ARM/GlobalISel/select-const.mir (revision b0785cd1cbf97dbd4eb39647ff22771ef0a7cfea) 
1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 4
2# RUN: llc -mtriple arm-- -mattr=+v6 -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s
3
4---
5name:            get_inverted
6legalized:       true
7regBankSelected: true
8selected:        false
9tracksRegLiveness: true
10registers:
11  - { id: 0, class: gprb }
12body:             |
13  bb.0:
14    liveins: $r0
15    ; CHECK-LABEL: name: get_inverted
16    ; CHECK: liveins: $r0
17    ; CHECK-NEXT: {{  $}}
18    ; CHECK-NEXT: [[MVNi:%[0-9]+]]:gpr = MVNi 0, 14 /* CC::al */, $noreg, $noreg
19    ; CHECK-NEXT: $r0 = COPY [[MVNi]]
20    ; CHECK-NEXT: MOVPCLR 14 /* CC::al */, $noreg, implicit $r0
21    %0:gprb(s32) = G_CONSTANT i32 -1
22    $r0 = COPY %0(s32)
23    MOVPCLR 14 /* CC::al */, $noreg, implicit $r0
24
25...
26