1; RUN: llc -mtriple arm-unknown -mattr=+vfp2,+v6t2 -global-isel -stop-after=irtranslator -verify-machineinstrs %s -o - | FileCheck %s -check-prefix=CHECK -check-prefix=ARM 2; RUN: llc -mtriple thumb-unknown -mattr=+vfp2,+v6t2 -global-isel -stop-after=irtranslator -verify-machineinstrs %s -o - | FileCheck %s -check-prefix=CHECK -check-prefix=THUMB 3 4declare arm_aapcscc i32 @int_varargs_target(i32, ...) 5 6define arm_aapcscc i32 @test_call_to_varargs_with_ints(ptr %a, i32 %b) { 7; CHECK-LABEL: name: test_call_to_varargs_with_ints 8; CHECK-DAG: [[AVREG:%[0-9]+]]:_(p0) = COPY $r0 9; CHECK-DAG: [[BVREG:%[0-9]+]]:_(s32) = COPY $r1 10; CHECK: ADJCALLSTACKDOWN 8, 0, 14 /* CC::al */, $noreg, implicit-def $sp, implicit $sp 11; CHECK: [[SP1:%[0-9]+]]:_(p0) = COPY $sp 12; CHECK: [[OFF1:%[0-9]+]]:_(s32) = G_CONSTANT i32 0 13; CHECK: [[FI1:%[0-9]+]]:_(p0) = G_PTR_ADD [[SP1]], [[OFF1]](s32) 14; CHECK: G_STORE [[BVREG]](s32), [[FI1]](p0){{.*}}store (s32) 15; CHECK: [[SP2:%[0-9]+]]:_(p0) = COPY $sp 16; CHECK: [[OFF2:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 17; CHECK: [[FI2:%[0-9]+]]:_(p0) = G_PTR_ADD [[SP2]], [[OFF2]](s32) 18; CHECK: G_STORE [[AVREG]](p0), [[FI2]](p0){{.*}}store (p0) 19; CHECK-DAG: $r0 = COPY [[BVREG]] 20; CHECK-DAG: $r1 = COPY [[AVREG]] 21; CHECK-DAG: $r2 = COPY [[BVREG]] 22; CHECK-DAG: $r3 = COPY [[AVREG]] 23; ARM: BL @int_varargs_target, csr_aapcs, implicit-def $lr, implicit $sp, implicit $r0, implicit $r1, implicit $r2, implicit $r3, implicit-def $r0 24; THUMB: tBL 14 /* CC::al */, $noreg, @int_varargs_target, csr_aapcs, implicit-def $lr, implicit $sp, implicit $r0, implicit $r1, implicit $r2, implicit $r3, implicit-def $r0 25; CHECK: [[RVREG:%[0-9]+]]:_(s32) = COPY $r0 26; CHECK: ADJCALLSTACKUP 8, -1, 14 /* CC::al */, $noreg, implicit-def $sp, implicit $sp 27; CHECK: $r0 = COPY [[RVREG]] 28; ARM: BX_RET 14 /* CC::al */, $noreg, implicit $r0 29; THUMB: tBX_RET 14 /* CC::al */, $noreg, implicit $r0 30entry: 31 %r = notail call arm_aapcscc i32(i32, ...) @int_varargs_target(i32 %b, ptr %a, i32 %b, ptr %a, i32 %b, ptr %a) 32 ret i32 %r 33} 34 35declare arm_aapcs_vfpcc float @float_varargs_target(float, double, ...) 36 37define arm_aapcs_vfpcc float @test_call_to_varargs_with_floats(float %a, double %b) { 38; CHECK-LABEL: name: test_call_to_varargs_with_floats 39; CHECK-DAG: [[AVREG:%[0-9]+]]:_(s32) = COPY $s0 40; CHECK-DAG: [[BVREG:%[0-9]+]]:_(s64) = COPY $d1 41; CHECK: ADJCALLSTACKDOWN 8, 0, 14 /* CC::al */, $noreg, implicit-def $sp, implicit $sp 42; CHECK-DAG: [[B1:%[0-9]+]]:_(s32), [[B2:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[BVREG]](s64) 43; CHECK: [[SP1:%[0-9]+]]:_(p0) = COPY $sp 44; CHECK: [[OFF1:%[0-9]+]]:_(s32) = G_CONSTANT i32 0 45; CHECK: [[FI1:%[0-9]+]]:_(p0) = G_PTR_ADD [[SP1]], [[OFF1]](s32) 46; CHECK: G_STORE [[BVREG]](s64), [[FI1]](p0){{.*}}store (s64) 47; CHECK-DAG: $r0 = COPY [[AVREG]] 48; CHECK-DAG: $r2 = COPY [[B1]] 49; CHECK-DAG: $r3 = COPY [[B2]] 50; ARM: BL @float_varargs_target, csr_aapcs, implicit-def $lr, implicit $sp, implicit $r0, implicit $r2, implicit $r3, implicit-def $r0 51; THUMB: tBL 14 /* CC::al */, $noreg, @float_varargs_target, csr_aapcs, implicit-def $lr, implicit $sp, implicit $r0, implicit $r2, implicit $r3, implicit-def $r0 52; CHECK: [[RVREG:%[0-9]+]]:_(s32) = COPY $r0 53; CHECK: ADJCALLSTACKUP 8, -1, 14 /* CC::al */, $noreg, implicit-def $sp, implicit $sp 54; CHECK: $s0 = COPY [[RVREG]] 55; ARM: BX_RET 14 /* CC::al */, $noreg, implicit $s0 56; THUMB: tBX_RET 14 /* CC::al */, $noreg, implicit $s0 57entry: 58 %r = notail call arm_aapcs_vfpcc float(float, double, ...) @float_varargs_target(float %a, double %b, double %b) 59 ret float %r 60} 61 62define arm_aapcs_vfpcc float @test_call_to_varargs_with_floats_fixed_args_only(float %a, double %b) { 63; CHECK-LABEL: name: test_call_to_varargs_with_floats_fixed_args_only 64; CHECK-DAG: [[AVREG:%[0-9]+]]:_(s32) = COPY $s0 65; CHECK-DAG: [[BVREG:%[0-9]+]]:_(s64) = COPY $d1 66; CHECK: ADJCALLSTACKDOWN 0, 0, 14 /* CC::al */, $noreg, implicit-def $sp, implicit $sp 67; CHECK-DAG: $r0 = COPY [[AVREG]] 68; CHECK-DAG: [[B1:%[0-9]+]]:_(s32), [[B2:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[BVREG]](s64) 69; CHECK-DAG: $r2 = COPY [[B1]] 70; CHECK-DAG: $r3 = COPY [[B2]] 71; ARM: BL @float_varargs_target, csr_aapcs, implicit-def $lr, implicit $sp, implicit $r0, implicit $r2, implicit $r3, implicit-def $r0 72; THUMB: tBL 14 /* CC::al */, $noreg, @float_varargs_target, csr_aapcs, implicit-def $lr, implicit $sp, implicit $r0, implicit $r2, implicit $r3, implicit-def $r0 73; CHECK: [[RVREG:%[0-9]+]]:_(s32) = COPY $r0 74; CHECK: ADJCALLSTACKUP 0, -1, 14 /* CC::al */, $noreg, implicit-def $sp, implicit $sp 75; CHECK: $s0 = COPY [[RVREG]] 76; ARM: BX_RET 14 /* CC::al */, $noreg, implicit $s0 77; THUMB: tBX_RET 14 /* CC::al */, $noreg, implicit $s0 78entry: 79 %r = notail call arm_aapcs_vfpcc float(float, double, ...) @float_varargs_target(float %a, double %b) 80 ret float %r 81} 82 83define arm_aapcs_vfpcc float @test_indirect_call_to_varargs(ptr %fptr, float %a, double %b) { 84; CHECK-LABEL: name: test_indirect_call_to_varargs 85; CHECK-DAG: [[FPTRVREG:%[0-9]+]]:gpr(p0) = COPY $r0 86; CHECK-DAG: [[AVREG:%[0-9]+]]:_(s32) = COPY $s0 87; CHECK-DAG: [[BVREG:%[0-9]+]]:_(s64) = COPY $d1 88; CHECK: ADJCALLSTACKDOWN 8, 0, 14 /* CC::al */, $noreg, implicit-def $sp, implicit $sp 89; CHECK-DAG: [[B1:%[0-9]+]]:_(s32), [[B2:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[BVREG]](s64) 90; CHECK: [[SP1:%[0-9]+]]:_(p0) = COPY $sp 91; CHECK: [[OFF1:%[0-9]+]]:_(s32) = G_CONSTANT i32 0 92; CHECK: [[FI1:%[0-9]+]]:_(p0) = G_PTR_ADD [[SP1]], [[OFF1]](s32) 93; CHECK: G_STORE [[BVREG]](s64), [[FI1]](p0){{.*}}store (s64) 94; CHECK-DAG: $r0 = COPY [[AVREG]] 95; CHECK-DAG: $r2 = COPY [[B1]] 96; CHECK-DAG: $r3 = COPY [[B2]] 97; ARM: BLX [[FPTRVREG]](p0), csr_aapcs, implicit-def $lr, implicit $sp, implicit $r0, implicit $r2, implicit $r3, implicit-def $r0 98; THUMB: tBLXr 14 /* CC::al */, $noreg, [[FPTRVREG]](p0), csr_aapcs, implicit-def $lr, implicit $sp, implicit $r0, implicit $r2, implicit $r3, implicit-def $r0 99; CHECK: [[RVREG:%[0-9]+]]:_(s32) = COPY $r0 100; CHECK: ADJCALLSTACKUP 8, -1, 14 /* CC::al */, $noreg, implicit-def $sp, implicit $sp 101; CHECK: $s0 = COPY [[RVREG]] 102; ARM: BX_RET 14 /* CC::al */, $noreg, implicit $s0 103; THUMB: tBX_RET 14 /* CC::al */, $noreg, implicit $s0 104entry: 105 %r = notail call arm_aapcs_vfpcc float(float, double, ...) %fptr(float %a, double %b, double %b) 106 ret float %r 107} 108