1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 4 2; RUN: llc -mtriple=arm-eabi -mattr=+vfp2 -global-isel=1 --verify-machineinstrs %s -o - | FileCheck %s 3 4define i32 @func_get_fpenv() { 5; CHECK-LABEL: func_get_fpenv: 6; CHECK: @ %bb.0: @ %entry 7; CHECK-NEXT: vmrs r0, fpscr 8; CHECK-NEXT: mov pc, lr 9entry: 10 %fpenv = call i32 @llvm.get.fpenv.i32() 11 ret i32 %fpenv 12} 13 14define i32 @func_get_fpenv_soft() #0 { 15; CHECK-LABEL: func_get_fpenv_soft: 16; CHECK: @ %bb.0: @ %entry 17; CHECK-NEXT: .save {r4, lr} 18; CHECK-NEXT: push {r4, lr} 19; CHECK-NEXT: .pad #8 20; CHECK-NEXT: sub sp, sp, #8 21; CHECK-NEXT: add r4, sp, #4 22; CHECK-NEXT: mov r0, r4 23; CHECK-NEXT: bl fegetenv 24; CHECK-NEXT: ldr r0, [r4] 25; CHECK-NEXT: add sp, sp, #8 26; CHECK-NEXT: pop {r4, lr} 27; CHECK-NEXT: mov pc, lr 28entry: 29 %fpenv = call i32 @llvm.get.fpenv.i32() 30 ret i32 %fpenv 31} 32 33define void @func_set_fpenv(i32 %fpenv) { 34; CHECK-LABEL: func_set_fpenv: 35; CHECK: @ %bb.0: @ %entry 36; CHECK-NEXT: vmsr fpscr, r0 37; CHECK-NEXT: mov pc, lr 38entry: 39 call void @llvm.set.fpenv.i32(i32 %fpenv) 40 ret void 41} 42 43define void @func_set_fpenv_soft(i32 %fpenv) #0 { 44; CHECK-LABEL: func_set_fpenv_soft: 45; CHECK: @ %bb.0: @ %entry 46; CHECK-NEXT: .save {r11, lr} 47; CHECK-NEXT: push {r11, lr} 48; CHECK-NEXT: .pad #8 49; CHECK-NEXT: sub sp, sp, #8 50; CHECK-NEXT: add r1, sp, #4 51; CHECK-NEXT: str r0, [r1] 52; CHECK-NEXT: mov r0, r1 53; CHECK-NEXT: bl fesetenv 54; CHECK-NEXT: add sp, sp, #8 55; CHECK-NEXT: pop {r11, lr} 56; CHECK-NEXT: mov pc, lr 57entry: 58 call void @llvm.set.fpenv.i32(i32 %fpenv) 59 ret void 60} 61 62define void @func_reset() { 63; CHECK-LABEL: func_reset: 64; CHECK: @ %bb.0: @ %entry 65; CHECK-NEXT: mov r0, #0 66; CHECK-NEXT: vmsr fpscr, r0 67; CHECK-NEXT: mov pc, lr 68entry: 69 call void @llvm.reset.fpenv() 70 ret void 71} 72 73define void @func_reset_soft() #0 { 74; CHECK-LABEL: func_reset_soft: 75; CHECK: @ %bb.0: @ %entry 76; CHECK-NEXT: .save {r11, lr} 77; CHECK-NEXT: push {r11, lr} 78; CHECK-NEXT: mvn r0, #0 79; CHECK-NEXT: bl fesetenv 80; CHECK-NEXT: pop {r11, lr} 81; CHECK-NEXT: mov pc, lr 82entry: 83 call void @llvm.reset.fpenv() 84 ret void 85} 86 87 88define i32 @get_fpmode_soft() #0 { 89; CHECK-LABEL: get_fpmode_soft: 90; CHECK: @ %bb.0: @ %entry 91; CHECK-NEXT: .save {r4, lr} 92; CHECK-NEXT: push {r4, lr} 93; CHECK-NEXT: .pad #8 94; CHECK-NEXT: sub sp, sp, #8 95; CHECK-NEXT: add r4, sp, #4 96; CHECK-NEXT: mov r0, r4 97; CHECK-NEXT: bl fegetmode 98; CHECK-NEXT: ldr r0, [r4] 99; CHECK-NEXT: add sp, sp, #8 100; CHECK-NEXT: pop {r4, lr} 101; CHECK-NEXT: mov pc, lr 102entry: 103 %fpenv = call i32 @llvm.get.fpmode.i32() 104 ret i32 %fpenv 105} 106 107define i32 @get_fpmode() nounwind { 108; CHECK-LABEL: get_fpmode: 109; CHECK: @ %bb.0: @ %entry 110; CHECK-NEXT: vmrs r0, fpscr 111; CHECK-NEXT: mov pc, lr 112entry: 113 %fpenv = call i32 @llvm.get.fpmode.i32() 114 ret i32 %fpenv 115} 116 117define void @set_fpmode_soft(i32 %fpmode) #0 { 118; CHECK-LABEL: set_fpmode_soft: 119; CHECK: @ %bb.0: @ %entry 120; CHECK-NEXT: .save {r11, lr} 121; CHECK-NEXT: push {r11, lr} 122; CHECK-NEXT: .pad #8 123; CHECK-NEXT: sub sp, sp, #8 124; CHECK-NEXT: add r1, sp, #4 125; CHECK-NEXT: str r0, [r1] 126; CHECK-NEXT: mov r0, r1 127; CHECK-NEXT: bl fesetmode 128; CHECK-NEXT: add sp, sp, #8 129; CHECK-NEXT: pop {r11, lr} 130; CHECK-NEXT: mov pc, lr 131entry: 132 call void @llvm.set.fpmode.i32(i32 %fpmode) 133 ret void 134} 135 136define void @set_fpmode(i32 %fpmode) nounwind { 137; CHECK-LABEL: set_fpmode: 138; CHECK: @ %bb.0: @ %entry 139; CHECK-NEXT: vmrs r1, fpscr 140; CHECK-NEXT: mov r2, #159 141; CHECK-NEXT: orr r2, r2, #-134217728 142; CHECK-NEXT: and r1, r1, r2 143; CHECK-NEXT: mvn r2, #159 144; CHECK-NEXT: sub r2, r2, #-134217728 145; CHECK-NEXT: and r0, r0, r2 146; CHECK-NEXT: orr r0, r1, r0 147; CHECK-NEXT: vmsr fpscr, r0 148; CHECK-NEXT: mov pc, lr 149entry: 150 call void @llvm.set.fpmode.i32(i32 %fpmode) 151 ret void 152} 153 154define void @reset_fpmode_soft() #0 { 155; CHECK-LABEL: reset_fpmode_soft: 156; CHECK: @ %bb.0: @ %entry 157; CHECK-NEXT: .save {r11, lr} 158; CHECK-NEXT: push {r11, lr} 159; CHECK-NEXT: mvn r0, #0 160; CHECK-NEXT: bl fesetmode 161; CHECK-NEXT: pop {r11, lr} 162; CHECK-NEXT: mov pc, lr 163entry: 164 call void @llvm.reset.fpmode() 165 ret void 166} 167 168define void @reset_fpmode() nounwind { 169; CHECK-LABEL: reset_fpmode: 170; CHECK: @ %bb.0: @ %entry 171; CHECK-NEXT: vmrs r0, fpscr 172; CHECK-NEXT: ldr r1, .LCPI11_0 173; CHECK-NEXT: and r0, r0, r1 174; CHECK-NEXT: vmsr fpscr, r0 175; CHECK-NEXT: mov pc, lr 176; CHECK-NEXT: .p2align 2 177; CHECK-NEXT: @ %bb.1: 178; CHECK-NEXT: .LCPI11_0: 179; CHECK-NEXT: .long 4160774399 @ 0xf80060ff 180entry: 181 call void @llvm.reset.fpmode() 182 ret void 183} 184 185attributes #0 = { nounwind "use-soft-float"="true" } 186 187